Skip to content

Commit fa7ea91

Browse files
author
iclsrc
committed
Merge from 'sycl' to 'sycl-web'
2 parents 6043e16 + 510cac8 commit fa7ea91

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

55 files changed

+805
-212
lines changed

‎buildbot/dependency.conf

+3-3
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,8 @@ ocl_cpu_rt_ver=2021.12.6.0.19
44
# https://github.com/intel/llvm/releases/download/2021-WW26/win-oclcpuexp-2021.12.6.0.19_rel.zip
55
ocl_cpu_rt_ver_win=2021.12.6.0.19
66
# Same GPU driver supports Level Zero and OpenCL
7-
# https://github.com/intel/compute-runtime/releases/tag/21.26.20194
8-
ocl_gpu_rt_ver=21.26.20194
7+
# https://github.com/intel/compute-runtime/releases/tag/21.33.20678
8+
ocl_gpu_rt_ver=21.33.20678
99
# Same GPU driver supports Level Zero and OpenCL
1010
# https://downloadmirror.intel.com/30579/a08/igfx_win_100.9684.zip
1111
# https://downloadmirror.intel.com/30381/a08/igfx_win10_100.9466.zip
@@ -31,7 +31,7 @@ ocloc_ver_win=27.20.100.9168
3131
[DRIVER VERSIONS]
3232
cpu_driver_lin=2021.12.6.0.19
3333
cpu_driver_win=2021.12.6.0.19
34-
gpu_driver_lin=21.26.20194
34+
gpu_driver_lin=21.33.20678
3535
gpu_driver_win=30.0.100.9684
3636
fpga_driver_lin=2021.12.6.0.19
3737
fpga_driver_win=2021.12.6.0.19

‎libclc/amdgcn-amdhsa/libspirv/SOURCES

+5-3
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,14 @@
1-
workitem/get_global_size.cl
2-
workitem/get_local_size.cl
3-
workitem/get_num_groups.cl
1+
atomic/loadstore_helpers.ll
2+
cl_khr_int64_extended_atomics/minmax_helpers.ll
43
synchronization/barrier.cl
54
math/cos.cl
65
math/sin.cl
76
math/sqrt.cl
87
math/atan.cl
98
math/cbrt.cl
9+
workitem/get_global_size.cl
10+
workitem/get_local_size.cl
11+
workitem/get_num_groups.cl
1012
workitem/get_max_sub_group_size.cl
1113
workitem/get_num_sub_groups.cl
1214
workitem/get_sub_group_id.cl

‎libclc/amdgcn-amdhsa/libspirv/atomic/loadstore_helpers.ll

+296
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,296 @@
1+
#if __clang_major__ >= 7
2+
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
3+
#else
4+
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
5+
#endif
6+
7+
declare void @llvm.trap()
8+
9+
define i32 @__clc__atomic_load_global_4_unordered(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
10+
entry:
11+
%0 = load atomic volatile i32, i32 addrspace(1)* %ptr unordered, align 4
12+
ret i32 %0
13+
}
14+
15+
define i32 @__clc__atomic_load_local_4_unordered(i32 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
16+
entry:
17+
%0 = load atomic volatile i32, i32 addrspace(3)* %ptr unordered, align 4
18+
ret i32 %0
19+
}
20+
21+
define i64 @__clc__atomic_load_global_8_unordered(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
22+
entry:
23+
%0 = load atomic volatile i64, i64 addrspace(1)* %ptr unordered, align 8
24+
ret i64 %0
25+
}
26+
27+
define i64 @__clc__atomic_load_local_8_unordered(i64 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
28+
entry:
29+
%0 = load atomic volatile i64, i64 addrspace(3)* %ptr unordered, align 8
30+
ret i64 %0
31+
}
32+
33+
define i32 @__clc__atomic_uload_global_4_unordered(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
34+
entry:
35+
%0 = load atomic volatile i32, i32 addrspace(1)* %ptr unordered, align 4
36+
ret i32 %0
37+
}
38+
39+
define i32 @__clc__atomic_uload_local_4_unordered(i32 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
40+
entry:
41+
%0 = load atomic volatile i32, i32 addrspace(3)* %ptr unordered, align 4
42+
ret i32 %0
43+
}
44+
45+
define i64 @__clc__atomic_uload_global_8_unordered(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
46+
entry:
47+
%0 = load atomic volatile i64, i64 addrspace(1)* %ptr unordered, align 8
48+
ret i64 %0
49+
}
50+
51+
define i64 @__clc__atomic_uload_local_8_unordered(i64 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
52+
entry:
53+
%0 = load atomic volatile i64, i64 addrspace(3)* %ptr unordered, align 8
54+
ret i64 %0
55+
}
56+
57+
define i32 @__clc__atomic_load_global_4_acquire(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
58+
entry:
59+
tail call void @llvm.trap()
60+
unreachable
61+
}
62+
63+
define i32 @__clc__atomic_load_local_4_acquire(i32 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
64+
entry:
65+
tail call void @llvm.trap()
66+
unreachable
67+
}
68+
69+
define i64 @__clc__atomic_load_global_8_acquire(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
70+
entry:
71+
tail call void @llvm.trap()
72+
unreachable
73+
}
74+
75+
define i64 @__clc__atomic_load_local_8_acquire(i64 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
76+
entry:
77+
tail call void @llvm.trap()
78+
unreachable
79+
}
80+
81+
define i32 @__clc__atomic_uload_global_4_acquire(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
82+
entry:
83+
tail call void @llvm.trap()
84+
unreachable
85+
}
86+
87+
define i32 @__clc__atomic_uload_local_4_acquire(i32 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
88+
entry:
89+
tail call void @llvm.trap()
90+
unreachable
91+
}
92+
93+
define i64 @__clc__atomic_uload_global_8_acquire(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
94+
entry:
95+
tail call void @llvm.trap()
96+
unreachable
97+
}
98+
99+
define i64 @__clc__atomic_uload_local_8_acquire(i64 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
100+
entry:
101+
tail call void @llvm.trap()
102+
unreachable
103+
}
104+
105+
106+
define i32 @__clc__atomic_load_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
107+
entry:
108+
tail call void @llvm.trap()
109+
unreachable
110+
}
111+
112+
define i32 @__clc__atomic_load_local_4_seq_cst(i32 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
113+
entry:
114+
tail call void @llvm.trap()
115+
unreachable
116+
}
117+
118+
define i64 @__clc__atomic_load_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
119+
entry:
120+
tail call void @llvm.trap()
121+
unreachable
122+
}
123+
124+
define i64 @__clc__atomic_load_local_8_seq_cst(i64 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
125+
entry:
126+
tail call void @llvm.trap()
127+
unreachable
128+
}
129+
130+
define i32 @__clc__atomic_uload_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
131+
entry:
132+
tail call void @llvm.trap()
133+
unreachable
134+
}
135+
136+
define i32 @__clc__atomic_uload_local_4_seq_cst(i32 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
137+
entry:
138+
tail call void @llvm.trap()
139+
unreachable
140+
}
141+
142+
define i64 @__clc__atomic_uload_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr) nounwind alwaysinline {
143+
entry:
144+
tail call void @llvm.trap()
145+
unreachable
146+
}
147+
148+
define i64 @__clc__atomic_uload_local_8_seq_cst(i64 addrspace(3)* nocapture %ptr) nounwind alwaysinline {
149+
entry:
150+
tail call void @llvm.trap()
151+
unreachable
152+
}
153+
154+
define void @__clc__atomic_store_global_4_unordered(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
155+
entry:
156+
store atomic volatile i32 %value, i32 addrspace(1)* %ptr unordered, align 4
157+
ret void
158+
}
159+
160+
define void @__clc__atomic_store_local_4_unordered(i32 addrspace(3)* nocapture %ptr, i32 %value) nounwind alwaysinline {
161+
entry:
162+
store atomic volatile i32 %value, i32 addrspace(3)* %ptr unordered, align 4
163+
ret void
164+
}
165+
166+
define void @__clc__atomic_store_global_8_unordered(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
167+
entry:
168+
store atomic volatile i64 %value, i64 addrspace(1)* %ptr unordered, align 8
169+
ret void
170+
}
171+
172+
define void @__clc__atomic_store_local_8_unordered(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
173+
entry:
174+
store atomic volatile i64 %value, i64 addrspace(3)* %ptr unordered, align 8
175+
ret void
176+
}
177+
178+
define void @__clc__atomic_ustore_global_4_unordered(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
179+
entry:
180+
store atomic volatile i32 %value, i32 addrspace(1)* %ptr unordered, align 4
181+
ret void
182+
}
183+
184+
define void @__clc__atomic_ustore_local_4_unordered(i32 addrspace(3)* nocapture %ptr, i32 %value) nounwind alwaysinline {
185+
entry:
186+
store atomic volatile i32 %value, i32 addrspace(3)* %ptr unordered, align 4
187+
ret void
188+
}
189+
190+
define void @__clc__atomic_ustore_global_8_unordered(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
191+
entry:
192+
store atomic volatile i64 %value, i64 addrspace(1)* %ptr unordered, align 8
193+
ret void
194+
}
195+
196+
define void @__clc__atomic_ustore_local_8_unordered(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
197+
entry:
198+
store atomic volatile i64 %value, i64 addrspace(3)* %ptr unordered, align 8
199+
ret void
200+
}
201+
202+
define void @__clc__atomic_store_global_4_release(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
203+
entry:
204+
tail call void @llvm.trap()
205+
unreachable
206+
}
207+
208+
define void @__clc__atomic_store_local_4_release(i32 addrspace(3)* nocapture %ptr, i32 %value) nounwind alwaysinline {
209+
entry:
210+
tail call void @llvm.trap()
211+
unreachable
212+
}
213+
214+
define void @__clc__atomic_store_global_8_release(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
215+
entry:
216+
tail call void @llvm.trap()
217+
unreachable
218+
}
219+
220+
define void @__clc__atomic_store_local_8_release(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
221+
entry:
222+
tail call void @llvm.trap()
223+
unreachable
224+
}
225+
226+
define void @__clc__atomic_ustore_global_4_release(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
227+
entry:
228+
tail call void @llvm.trap()
229+
unreachable
230+
}
231+
232+
define void @__clc__atomic_ustore_local_4_release(i32 addrspace(3)* nocapture %ptr, i32 %value) nounwind alwaysinline {
233+
entry:
234+
tail call void @llvm.trap()
235+
unreachable
236+
}
237+
238+
define void @__clc__atomic_ustore_global_8_release(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
239+
entry:
240+
tail call void @llvm.trap()
241+
unreachable
242+
}
243+
244+
define void @__clc__atomic_ustore_local_8_release(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
245+
entry:
246+
tail call void @llvm.trap()
247+
unreachable
248+
}
249+
250+
define void @__clc__atomic_store_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
251+
entry:
252+
tail call void @llvm.trap()
253+
unreachable
254+
}
255+
256+
define void @__clc__atomic_store_local_4_seq_cst(i32 addrspace(3)* nocapture %ptr, i32 %value) nounwind alwaysinline {
257+
entry:
258+
tail call void @llvm.trap()
259+
unreachable
260+
}
261+
262+
define void @__clc__atomic_store_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
263+
entry:
264+
tail call void @llvm.trap()
265+
unreachable
266+
}
267+
268+
define void @__clc__atomic_store_local_8_seq_cst(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
269+
entry:
270+
tail call void @llvm.trap()
271+
unreachable
272+
}
273+
274+
define void @__clc__atomic_ustore_global_4_seq_cst(i32 addrspace(1)* nocapture %ptr, i32 %value) nounwind alwaysinline {
275+
entry:
276+
tail call void @llvm.trap()
277+
unreachable
278+
}
279+
280+
define void @__clc__atomic_ustore_local_4_seq_cst(i32 addrspace(3)* nocapture %ptr, i32 %value) nounwind alwaysinline {
281+
entry:
282+
tail call void @llvm.trap()
283+
unreachable
284+
}
285+
286+
define void @__clc__atomic_ustore_global_8_seq_cst(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
287+
entry:
288+
tail call void @llvm.trap()
289+
unreachable
290+
}
291+
292+
define void @__clc__atomic_ustore_local_8_seq_cst(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
293+
entry:
294+
tail call void @llvm.trap()
295+
unreachable
296+
}

‎libclc/amdgcn-amdhsa/libspirv/cl_khr_int64_extended_atomics/minmax_helpers.ll

+54
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
1+
#if __clang_major__ >= 7
2+
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
3+
#else
4+
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
5+
#endif
6+
7+
8+
define i64 @__clc__sync_fetch_and_min_global_8(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
9+
entry:
10+
%0 = atomicrmw volatile min i64 addrspace(1)* %ptr, i64 %value seq_cst
11+
ret i64 %0
12+
}
13+
14+
define i64 @__clc__sync_fetch_and_umin_global_8(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
15+
entry:
16+
%0 = atomicrmw volatile umin i64 addrspace(1)* %ptr, i64 %value seq_cst
17+
ret i64 %0
18+
}
19+
20+
define i64 @__clc__sync_fetch_and_min_local_8(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
21+
entry:
22+
%0 = atomicrmw volatile min i64 addrspace(3)* %ptr, i64 %value seq_cst
23+
ret i64 %0
24+
}
25+
26+
define i64 @__clc__sync_fetch_and_umin_local_8(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
27+
entry:
28+
%0 = atomicrmw volatile umin i64 addrspace(3)* %ptr, i64 %value seq_cst
29+
ret i64 %0
30+
}
31+
32+
define i64 @__clc__sync_fetch_and_max_global_8(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
33+
entry:
34+
%0 = atomicrmw volatile max i64 addrspace(1)* %ptr, i64 %value seq_cst
35+
ret i64 %0
36+
}
37+
38+
define i64 @__clc__sync_fetch_and_umax_global_8(i64 addrspace(1)* nocapture %ptr, i64 %value) nounwind alwaysinline {
39+
entry:
40+
%0 = atomicrmw volatile umax i64 addrspace(1)* %ptr, i64 %value seq_cst
41+
ret i64 %0
42+
}
43+
44+
define i64 @__clc__sync_fetch_and_max_local_8(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
45+
entry:
46+
%0 = atomicrmw volatile max i64 addrspace(3)* %ptr, i64 %value seq_cst
47+
ret i64 %0
48+
}
49+
50+
define i64 @__clc__sync_fetch_and_umax_local_8(i64 addrspace(3)* nocapture %ptr, i64 %value) nounwind alwaysinline {
51+
entry:
52+
%0 = atomicrmw volatile umax i64 addrspace(3)* %ptr, i64 %value seq_cst
53+
ret i64 %0
54+
}

0 commit comments

Comments
 (0)