[MIPS] Fix miscompiles consecutive half operations

Use softPromoteHalf legalization for fp16 rather than PromoteFloat.

Fix llvm#97975.

Author: yingopq

llvm/lib/Target/Mips/MipsISelLowering.h

@@ -369,9 +369,11 @@ class TargetRegisterClass;
       return getTargetMachine().isPositionIndependent();
     }
 
-   CCAssignFn *CCAssignFnForCall() const;
+    CCAssignFn *CCAssignFnForCall() const;
 
-   CCAssignFn *CCAssignFnForReturn() const;
+    CCAssignFn *CCAssignFnForReturn() const;
+
+    bool softPromoteHalfType() const override { return true; }
 
   protected:
     SDValue getGlobalReg(SelectionDAG &DAG, EVT Ty) const;
@@ -390,8 +392,8 @@ class TargetRegisterClass;
           DAG.getLoad(Ty, DL, DAG.getEntryNode(), GOT,
                       MachinePointerInfo::getGOT(DAG.getMachineFunction()));
       unsigned LoFlag = IsN32OrN64 ? MipsII::MO_GOT_OFST : MipsII::MO_ABS_LO;
-      SDValue Lo = DAG.getNode(MipsISD::Lo, DL, Ty,
-                               getTargetNode(N, Ty, DAG, LoFlag));
+      SDValue Lo =
+          DAG.getNode(MipsISD::Lo, DL, Ty, getTargetNode(N, Ty, DAG, LoFlag));
       return DAG.getNode(ISD::ADD, DL, Ty, Load, Lo);
     }
 

llvm/test/CodeGen/Mips/fp16-promote.ll

@@ -62,8 +62,8 @@ define <4 x float> @test_vec_fpext_float(ptr %p) #0 {
 ; CHECK-LIBCALL-LABEL: test_vec_fpext_double:
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
-; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: cvt.d.s
+; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: cvt.d.s
 ; CHECK-LIBCALL: cvt.d.s
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)