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31 | 31 |
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32 | 32 | #define EXTFLASH_NODE DT_INST(0, st_stm32_ospi_nor)
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33 | 33 | #define EXTFLASH_ADDR DT_REG_ADDR(DT_INST(0, st_stm32_ospi_nor))
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34 |
| -#define EXTFLASH_SIZE DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_ospi_nor), 1) |
| 34 | +#define EXTFLASH_SIZE DT_REG_SIZE(DT_INST(0, st_stm32_ospi_nor)) |
35 | 35 |
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36 | 36 | #elif defined(CONFIG_STM32_MEMMAP) && DT_NODE_EXISTS(DT_INST(0, st_stm32_qspi_nor))
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37 | 37 | /* On stm32 QSPI, external flash is mapped in XIP region at address given by the reg property. */
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38 | 38 |
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39 | 39 | #define EXTFLASH_NODE DT_INST(0, st_stm32_qspi_nor)
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40 | 40 | #define EXTFLASH_ADDR DT_REG_ADDR(DT_INST(0, st_stm32_qspi_nor))
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41 |
| -#define EXTFLASH_SIZE DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_qspi_nor), 1) |
| 41 | +#define EXTFLASH_SIZE DT_REG_SIZE(DT_INST(0, st_stm32_ospi_nor)) |
42 | 42 |
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43 | 43 | #elif defined(CONFIG_STM32_MEMMAP) && DT_NODE_EXISTS(DT_INST(0, st_stm32_xspi_nor))
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44 | 44 | /* On stm32 XSPI, external flash is mapped in XIP region at address given by the reg property. */
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45 | 45 |
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46 | 46 | #define EXTFLASH_NODE DT_INST(0, st_stm32_xspi_nor)
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47 | 47 | #define EXTFLASH_ADDR DT_REG_ADDR(DT_INST(0, st_stm32_xspi_nor))
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48 |
| -#define EXTFLASH_SIZE DT_REG_ADDR_BY_IDX(DT_INST(0, st_stm32_xspi_nor), 1) |
| 48 | +#define EXTFLASH_SIZE DT_REG_SIZE(DT_INST(0, st_stm32_ospi_nor)) |
49 | 49 |
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50 | 50 | #elif defined(CONFIG_FLASH_MSPI_NOR) && defined(CONFIG_SOC_NRF54H20_CPUAPP)
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51 | 51 |
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