samples: openamp_rsc_table: enable support for imx95_evk

openamp_rsc_table will run on the i.MX95 M7 core and can communicate
to the A55 that runs linux-imx.

Signed-off-by: Andre Heinemans <[email protected]>

Author: AndreHeinemans-NXP

samples/subsys/ipc/openamp_rsc_table/boards/imx95_evk_mimx9596_m7.conf

@@ -0,0 +1,12 @@
+CONFIG_CLOCK_CONTROL=y
+CONFIG_LOG=y
+CONFIG_CONSOLE=y
+CONFIG_OPENAMP_WITH_DCACHE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_ARM_SCMI=y
+CONFIG_IPM_MBOX=y
+CONFIG_MBOX_NXP_IMX_MU=y
+CONFIG_MBOX_INIT_PRIORITY=0
+CONFIG_LOG_MODE_MINIMAL=y
+CONFIG_LOG_DEFAULT_LEVEL=0
+CONFIG_OPENAMP_COPY_RSC_TABLE=y

samples/subsys/ipc/openamp_rsc_table/boards/imx95_evk_mimx9596_m7.overlay

@@ -0,0 +1,37 @@
+/*
+ * Copyright 2025 NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	chosen {
+		/*
+		 * shared memory reserved for the inter-processor communication
+		 */
+		zephyr,ipc_shm = &shmem;
+		zephyr,ipc_rsc_table = &rsc_table;
+		zephyr,ipc = &mailbox0;
+	};
+
+	shmem: memory@88000000 {
+		compatible = "mmio-sram";
+		reg = <0x88000000 0x500000>;
+	};
+
+	rsc_table: memory@88220000 {
+		compatible = "mmio-sram";
+		reg = <0x88220000 0x100>;
+	};
+
+	mailbox0: mailbox {
+		compatible = "zephyr,mbox-ipm";
+		mboxes = <&mu7 1>, <&mu7 1>;
+		mbox-names = "tx", "rx";
+		status = "okay";
+	};
+};
+
+&mu7 {
+	status = "okay";
+};