drivers: stm32: use cache peripheral driver

Closes #71268

Signed-off-by: Henrik Lindblom <[email protected]>

Author: Henrik Lindblom

drivers/flash/flash_stm32l5x.c

@@ -11,11 +11,11 @@ LOG_MODULE_REGISTER(LOG_DOMAIN);
 
 #include <zephyr/kernel.h>
 #include <zephyr/device.h>
+#include <zephyr/cache.h>
 #include <string.h>
 #include <zephyr/drivers/flash.h>
 #include <zephyr/init.h>
 #include <soc.h>
-#include <stm32_ll_icache.h>
 #include <stm32_ll_system.h>
 
 #include "flash_stm32.h"
@@ -37,86 +37,6 @@ LOG_MODULE_REGISTER(LOG_DOMAIN);
 #define ICACHE_DISABLE_TIMEOUT_VALUE           1U   /* 1ms */
 #define ICACHE_INVALIDATE_TIMEOUT_VALUE        1U   /* 1ms */
 
-static int stm32_icache_disable(void)
-{
-	int status = 0;
-	uint32_t tickstart;
-
-	LOG_DBG("I-cache Disable");
-	/* Clear BSYENDF flag first and then disable the instruction cache
-	 * that starts a cache invalidation procedure
-	 */
-	CLEAR_BIT(ICACHE->FCR, ICACHE_FCR_CBSYENDF);
-
-	LL_ICACHE_Disable();
-
-	/* Get tick */
-	tickstart = k_uptime_get_32();
-
-	/* Wait for instruction cache to get disabled */
-	while (LL_ICACHE_IsEnabled()) {
-		if ((k_uptime_get_32() - tickstart) >
-						ICACHE_DISABLE_TIMEOUT_VALUE) {
-			/* New check to avoid false timeout detection in case
-			 * of preemption.
-			 */
-			if (LL_ICACHE_IsEnabled()) {
-				status = -ETIMEDOUT;
-				break;
-			}
-		}
-	}
-
-	return status;
-}
-
-static void stm32_icache_enable(void)
-{
-	LOG_DBG("I-cache Enable");
-	LL_ICACHE_Enable();
-}
-
-static int icache_wait_for_invalidate_complete(void)
-{
-	int status = -EIO;
-	uint32_t tickstart;
-
-	/* Check if ongoing invalidation operation */
-	if (LL_ICACHE_IsActiveFlag_BUSY()) {
-		/* Get tick */
-		tickstart = k_uptime_get_32();
-
-		/* Wait for end of cache invalidation */
-		while (!LL_ICACHE_IsActiveFlag_BSYEND()) {
-			if ((k_uptime_get_32() - tickstart) >
-					ICACHE_INVALIDATE_TIMEOUT_VALUE) {
-				break;
-			}
-		}
-	}
-
-	/* Clear any pending flags */
-	if (LL_ICACHE_IsActiveFlag_BSYEND()) {
-		LOG_DBG("I-cache Invalidation complete");
-
-		LL_ICACHE_ClearFlag_BSYEND();
-		status = 0;
-	} else {
-		LOG_ERR("I-cache Invalidation timeout");
-
-		status = -ETIMEDOUT;
-	}
-
-	if (LL_ICACHE_IsActiveFlag_ERR()) {
-		LOG_ERR("I-cache error");
-
-		LL_ICACHE_ClearFlag_ERR();
-		status = -EIO;
-	}
-
-	return status;
-}
-
 /* Macro to check if the flash is Dual bank or not */
 #if defined(CONFIG_SOC_SERIES_STM32H5X)
 #define stm32_flash_has_2_banks(flash_device) true
@@ -302,19 +222,15 @@ int flash_stm32_block_erase_loop(const struct device *dev,
 {
 	unsigned int address = offset;
 	int rc = 0;
-	bool icache_enabled = LL_ICACHE_IsEnabled();
 
-	if (icache_enabled) {
-		/* Disable icache, this will start the invalidation procedure.
-		 * All changes(erase/write) to flash memory should happen when
-		 * i-cache is disabled. A write to flash performed without
-		 * disabling i-cache will set ERRF error flag in SR register.
-		 */
-		rc = stm32_icache_disable();
-		if (rc != 0) {
-			return rc;
-		}
-	}
+	/* Disable icache, this will start the invalidation procedure.
+	 * All changes(erase/write) to flash memory should happen when
+	 * i-cache is disabled. A write to flash performed without
+	 * disabling i-cache will set ERRF error flag in SR register.
+	 */
+
+	LOG_DBG("I-cache Disable");
+	sys_cache_instr_disable();
 
 	for (; address <= offset + len - 1 ; address += FLASH_PAGE_SIZE) {
 		rc = erase_page(dev, address);
@@ -323,17 +239,8 @@ int flash_stm32_block_erase_loop(const struct device *dev,
 		}
 	}
 
-	if (icache_enabled) {
-		/* Since i-cache was disabled, this would start the
-		 * invalidation procedure, so wait for completion.
-		 */
-		rc = icache_wait_for_invalidate_complete();
-
-		/* I-cache should be enabled only after the
-		 * invalidation is complete.
-		 */
-		stm32_icache_enable();
-	}
+	LOG_DBG("I-cache Enable");
+	sys_cache_instr_enable();
 
 	return rc;
 }
@@ -342,19 +249,15 @@ int flash_stm32_write_range(const struct device *dev, unsigned int offset,
 			    const void *data, unsigned int len)
 {
 	int i, rc = 0;
-	bool icache_enabled = LL_ICACHE_IsEnabled();
 
-	if (icache_enabled) {
-		/* Disable icache, this will start the invalidation procedure.
-		 * All changes(erase/write) to flash memory should happen when
-		 * i-cache is disabled. A write to flash performed without
-		 * disabling i-cache will set ERRF error flag in SR register.
-		 */
-		rc = stm32_icache_disable();
-		if (rc != 0) {
-			return rc;
-		}
-	}
+	/* Disable icache, this will start the invalidation procedure.
+	 * All changes(erase/write) to flash memory should happen when
+	 * i-cache is disabled. A write to flash performed without
+	 * disabling i-cache will set ERRF error flag in SR register.
+	 */
+
+	LOG_DBG("I-cache Disable");
+	sys_cache_instr_disable();
 
 	for (i = 0; i < len; i += FLASH_STM32_WRITE_BLOCK_SIZE) {
 		rc = write_nwords(dev, offset + i, ((const uint32_t *) data + (i>>2)),
@@ -364,23 +267,8 @@ int flash_stm32_write_range(const struct device *dev, unsigned int offset,
 		}
 	}
 
-	if (icache_enabled) {
-		int rc2;
-
-		/* Since i-cache was disabled, this would start the
-		 * invalidation procedure, so wait for completion.
-		 */
-		rc2 = icache_wait_for_invalidate_complete();
-
-		if (!rc) {
-			rc = rc2;
-		}
-
-		/* I-cache should be enabled only after the
-		 * invalidation is complete.
-		 */
-		stm32_icache_enable();
-	}
+	LOG_DBG("I-cache Enable");
+	sys_cache_instr_enable();
 
 	return rc;
 }