arm: Musca B1: Migrate to eFlash

Musca B1 has 2 x 2MB embedded flash memories (eFlash). The flash
memories are connected to the AHB Master Expansion “Code Interface”.

Signed-off-by: Karl Zhang <[email protected]>

Author: Karl Zhang

boards/arm/v2m_musca_b1/doc/index.rst

@@ -256,7 +256,7 @@ The ARM Musca B1 test chip implements a Serial Configuration Control (SCC)
 register. The purpose of this register is to allow individual control of
 clocks, reset-signals and interrupts to peripherals, and pin-muxing.
 
-QSPI boot memory
+Boot memory
 ================
 Normal Musca-B1 test chip boot operation is from 4MB eFlash by default, and
 it offers the fastest boot method.
@@ -348,38 +348,28 @@ Follow the build steps for AN521 target while replacing the platform with
 ``-DTARGET_PLATFORM=MUSCA_B1`` and compiler (if required) with ``-DCOMPILER=GNUARM``
 
 Copy over tfm as a library to the Zephyr project source and create a shortcut
-for the secure veneers.
-
-.. code-block:: bash
-
-   cp -r install/ $ZEPHYR_PROJECT/src/ext
-   cp $ZEPHYR_PROJECT/src/ext/install/export/tfm/veneers/s_veneers.o $ZEPHYR_PROJECT/src/ext
-
-
-Build the Zephyr app in the usual way.
+for the secure veneers and necessary header files. All files are in the install
+folder after TF-M built.
 
 Uploading an application to V2M Musca B1
 ----------------------------------------
 
 Applications must be converted to Intel's hex format before being flashed to a
 V2M Musca B1. An optional bootloader can be prepended to the image.
-The QSPI flash base address alias is 0x0.
-
+The QSPI flash base address alias is 0x0, and the eFlash base address alias is
+0xA000000.
 The image offset is calculated by adding the flash offset to the
 bootloader partition size.
 
-A third-party tool (srecord) is used to generate the Intel formatted hex image. For more information
-refer to the `Srecord Manual`_.
+A third-party tool (srecord) is used to generate the Intel formatted hex image.
+For more information refer to the `Srecord Manual`_.
 
 .. code-block:: bash
 
-   srec_cat $BIN_BOOLOADER -Binary -offset $QSPI_FLASH_OFFSET $BIN_SNS -Binary -offset $IMAGE_OFFSET -o $HEX_FLASHABLE -Intel
-
-   # For a 64K bootloader IMAGE_OFFSET = $QSPI_FLASH_OFFSET + 0x10000
-   srec_cat $BIN_BOOLOADER -Binary -offset 0x0 $BIN_SNS -Binary -offset 0x10000 -o $HEX_FLASHABLE -Intel
+   srec_cat $BIN_BOOLOADER -Binary -offset $FLASH_OFFSET $BIN_SNS -Binary -offset $IMAGE_OFFSET -o $HEX_FLASHABLE -Intel
 
-   # For a 256K bootloader IMAGE_OFFSET = $QSPI_FLASH_OFFSET + 0x40000
-   srec_cat $BIN_BOOLOADER -Binary -offset 0x0 $BIN_SNS -Binary -offset 0x40000 -o $HEX_FLASHABLE -Intel
+   # For a 128K bootloader IMAGE_OFFSET = $FLASH_OFFSET + 0x20000
+   srec_cat $BIN_BOOLOADER -Binary -offset 0xA000000 $BIN_SNS -Binary -offset 0xA020000 -o $HEX_FLASHABLE -Intel
 
 Connect the V2M Musca B1 to your host computer using the USB port. You should
 see a USB connection exposing a Mass Storage (MUSCA_B) and a USB Serial Port.

boards/arm/v2m_musca_b1/v2m_musca_b1.dts

@@ -39,9 +39,9 @@
 		};
 	};
 
-	flash0: flash@10000000 {
-		/* QSPI flash */
-		reg = <0x10000000 0x2000000>;
+	flash0: flash@1a000000 {
+		/* Embedded flash */
+		reg = <0x1a000000 0x200000>;
 	};
 
 	sram0: memory@30000000 {

boards/arm/v2m_musca_b1/v2m_musca_b1_nonsecure.dts

@@ -39,9 +39,9 @@
 		};
 	};
 
-	flash0: flash@30400 {
-		/* QSPI flash */
-		reg = <0x00030400 0x1fcfc00>;
+	flash0: flash@0a060400 {
+		/* Embedded flash */
+		reg = <0x0a060400 0x19fc00>;
 	};
 
 	sram0: memory@20070000 {

boards/arm/v2m_musca_b1/v2m_musca_b1_nonsecure.yaml

@@ -7,4 +7,4 @@ toolchain:
   - gnuarmemb
   - xtools
 ram: 64
-flash: 32575
+flash: 1663