arch: arm: Fix incorrect Cortex-R device tree specification.

1. Replace the non-existent CPU device binding ("Cortex-R") specified
   by the CPU node with a proper one.

2. Relocate CPU node declaration to SoC dtsi:

  The CPU node should be declared in the SoC dtsi because the core
  type is SoC-dependent. In fact, this is exactly how it is done in
  the Cortex-M port.

3. Remove core_intc (supposedly Cortex-R VIC):

  Unlike the NVIC of Cortex-M, the VIC of Cortex-R is not a true
 interrupt controller in the conventional sense and merely acts as
 a CPU input port for aggregated interrupt request and vector index
 signals. For this reason, there is no point in declaring it in the
 device tree and specifying it as an interrupt parent. All SoCs
 incorporating Cortex-R implement a separate true interrupt
 controller (for instance, GIC for Zynq MPSoC and VIM for Hercules).

Signed-off-by: Stephanos Ioannidis <[email protected]>

Author: stephanosio

dts/arm/armv7-r.dtsi

@@ -3,32 +3,14 @@
  *
  * SPDX-License-Identifier: Apache-2.0
  */
+
 #include "skeleton.dtsi"
 
 / {
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "Cortex-R";
-			reg = <0>;
-		};
-
-		core_intc: core_intc@0 {
-			compatible = "armv7-r,core-intc";
-			reg = <0x00 0x4>;
-			interrupt-controller;
-			#interrupt-cells = <2>;
-		};
-	};
-
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "simple-bus";
 		ranges;
 	};
 };
-

dts/arm/xilinx/zynqmp.dtsi

@@ -2,14 +2,24 @@
  * Copyright (c) 2019 Lexmark International, Inc.
  *
  * SPDX-License-Identifier: Apache-2.0
- *
  */
 
 #include <mem.h>
 #include <arm/armv7-r.dtsi>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
 / {
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-r4";
+			reg = <0>;
+		};
+	};
+
 	soc {
 		interrupt-parent = <&gic>;
 
@@ -19,7 +29,6 @@
 					<0xf9020000 0x100>;
 			interrupt-controller;
 			#interrupt-cells = <3>;
-			interrupt-parent = <&core_intc>;
 			label = "GIC";
 			status = "okay";
 		};