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arch: arm: Optimise Cortex-R exception return function.
z_arm_exc_exit (z_arm_int_exit) requires the current execution mode to be specified as a parameter (through r0). This is not necessary because this value can be directly read from CPSR. This commit modifies the exception return function to retrieve the current execution mode from CPSR and removes all provisions for passing the execution mode parameter. Signed-off-by: Stephanos Ioannidis <[email protected]>
1 parent d384fe9 commit 7339a52

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4 files changed

+4
-27
lines changed

4 files changed

+4
-27
lines changed

arch/arm/core/exc_exit.S

+4-18
Original file line numberDiff line numberDiff line change
@@ -71,10 +71,6 @@ SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_int_exit)
7171
*/
7272

7373
SECTION_SUBSEC_FUNC(TEXT, _HandlerModeExit, z_arm_exc_exit)
74-
#if defined(CONFIG_CPU_CORTEX_R)
75-
/* r0 contains the caller mode */
76-
push {r0, lr}
77-
#endif
7874

7975
#ifdef CONFIG_PREEMPT_ENABLED
8076
ldr r0, =_kernel
@@ -117,9 +113,6 @@ _EXIT_EXC:
117113
#if defined(CONFIG_CPU_CORTEX_M)
118114
bx lr
119115
#elif defined(CONFIG_CPU_CORTEX_R)
120-
/* Restore the caller mode to r0 */
121-
pop {r0, lr}
122-
123116
/*
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* Restore r0-r3, r12 and lr stored into the process stack by the mode
125118
* entry function. These registers are saved by _isr_wrapper for IRQ mode
@@ -128,22 +121,15 @@ _EXIT_EXC:
128121
* r0-r3 are either the values from the thread before it was switched out
129122
* or they are the args to _new_thread for a new thread.
130123
*/
131-
push {r4, r5}
124+
push {r4-r6}
125+
mrs r6, cpsr
132126

133-
cmp r0, #RET_FROM_SVC
134127
cps #MODE_SYS
135128
ldmia sp!, {r0-r5}
136-
beq _svc_exit
137-
138-
cps #MODE_IRQ
139-
b _exc_exit
140-
141-
_svc_exit:
142-
cps #MODE_SVC
129+
msr cpsr_c, r6
143130

144-
_exc_exit:
145131
mov r12, r4
146132
mov lr, r5
147-
pop {r4, r5}
133+
pop {r4-r6}
148134
movs pc, lr
149135
#endif

arch/arm/core/isr_wrapper.S

-4
Original file line numberDiff line numberDiff line change
@@ -171,10 +171,6 @@ _idle_state_cleared:
171171
#error Unknown ARM architecture
172172
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
173173

174-
#if defined(CONFIG_CPU_CORTEX_R)
175-
mov r0, #RET_FROM_IRQ
176-
#endif
177-
178174
/* Use 'bx' instead of 'b' because 'bx' can jump further, and use
179175
* 'bx' instead of 'blx' because exception return is done in
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* z_arm_int_exit() */

arch/arm/core/swap_helper.S

-2
Original file line numberDiff line numberDiff line change
@@ -618,15 +618,13 @@ demux:
618618
blx z_irq_do_offload /* call C routine which executes the offload */
619619

620620
/* exception return is done in z_arm_int_exit() */
621-
mov r0, #RET_FROM_SVC
622621
b z_arm_int_exit
623622
#endif
624623

625624
_context_switch:
626625
/* handler mode exit, to PendSV */
627626
bl z_arm_pendsv
628627

629-
mov r0, #RET_FROM_SVC
630628
b z_arm_int_exit
631629

632630
_oops:

include/arch/arm/cortex_r/cpu.h

-3
Original file line numberDiff line numberDiff line change
@@ -31,9 +31,6 @@
3131

3232
#define FPEXC_EN (1 << 30)
3333

34-
#define RET_FROM_SVC 0
35-
#define RET_FROM_IRQ 1
36-
3734
#define __ISB() __asm__ volatile ("isb sy" : : : "memory")
3835
#define __DMB() __asm__ volatile ("dmb sy" : : : "memory")
3936

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