boards: arm: Enable RTC backup RAM on some boards

This patch enables STM32 RTC BBRAM in DTS on some STM32 boards for
testing purposes.

Signed-off-by: Patryk Duda <[email protected]>

Author: duda-patryk

boards/arm/nucleo_wb55rg/nucleo_wb55rg.dts

@@ -150,6 +150,10 @@
 	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
 		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
 	status = "okay";
+
+	backup_regs {
+		status = "okay";
+	};
 };
 
 &spi1 {

boards/arm/stm32f0_disco/stm32f0_disco.dts

@@ -48,6 +48,10 @@
 	};
 };
 
+&clk_lsi {
+	status = "okay";
+};
+
 &clk_hse {
 	clock-frequency = <DT_FREQ_M(8)>;
 	status = "okay";
@@ -120,3 +124,13 @@
 &iwdg {
 	status = "okay";
 };
+
+&rtc {
+	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
+		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
+	status = "okay";
+
+	backup_regs {
+		status = "okay";
+	};
+};

boards/arm/stm32f3_disco/stm32f3_disco.dts

@@ -170,6 +170,10 @@ zephyr_udc0: &usb {
 	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
 		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
 	status = "okay";
+
+	backup_regs {
+		status = "okay";
+	};
 };
 
 &can1 {

boards/arm/stm32f4_disco/stm32f4_disco.dts

@@ -112,6 +112,10 @@
 	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
 		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
 	status = "okay";
+
+	backup_regs {
+		status = "okay";
+	};
 };
 
 zephyr_udc0: &usbotg_fs {

boards/arm/stm32f746g_disco/stm32f746g_disco.dts

@@ -143,6 +143,10 @@ zephyr_udc0: &usbotg_fs {
 	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
 		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
 	status = "okay";
+
+	backup_regs {
+		status = "okay";
+	};
 };
 
 &sdmmc1 {

boards/arm/stm32h735g_disco/stm32h735g_disco.dts

@@ -55,6 +55,10 @@
 	status = "okay";
 };
 
+&clk_lsi {
+	status = "okay";
+};
+
 &pll {
 	div-m = <5>;
 	mul-n = <110>;
@@ -150,3 +154,13 @@
 		};
 	};
 };
+
+&rtc {
+	clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>,
+		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
+	status = "okay";
+
+	backup_regs {
+		status = "okay";
+	};
+};

boards/arm/stm32l1_disco/stm32l1_disco.dts

@@ -46,6 +46,10 @@
 	};
 };
 
+&clk_lsi {
+	status = "okay";
+};
+
 &clk_hsi {
 	status = "okay";
 };
@@ -114,3 +118,13 @@
 	pinctrl-names = "default";
 	status = "okay";
 };
+
+&rtc {
+	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
+		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
+	status = "okay";
+
+	backup_regs {
+		status = "okay";
+	};
+};

boards/arm/stm32l476g_disco/stm32l476g_disco.dts

@@ -102,4 +102,8 @@
 	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
 		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
 	status = "okay";
+
+	backup_regs {
+		status = "okay";
+	};
 };