doc: correct path to boards/riscv

The board area was renamed from riscv32 to riscv back in July to
accommodate riscv64 support.  Fix the remaining references in
documentation.

Signed-off-by: Peter Bigot <[email protected]>

Author: pabigot

boards/riscv/rv32m1_vega/doc/index.rst

@@ -457,13 +457,13 @@ first make sure you're booting the right core.
 
 1. In one terminal, use OpenOCD to connect to the board::
 
-     ~/rv32m1-openocd -f boards/riscv32/rv32m1_vega/support/openocd_rv32m1_vega_ri5cy.cfg
+     ~/rv32m1-openocd -f boards/riscv/rv32m1_vega/support/openocd_rv32m1_vega_ri5cy.cfg
 
    The output should look like this:
 
    .. code-block:: none
 
-      $ ~/rv32m1-openocd -f boards/riscv32/rv32m1_vega/support/openocd_rv32m1_vega_ri5cy.cfg
+      $ ~/rv32m1-openocd -f boards/riscv/rv32m1_vega/support/openocd_rv32m1_vega_ri5cy.cfg
       Open On-Chip Debugger 0.10.0+dev-00431-ge1ec3c7d (2018-10-31-07:29)
       [...]
       Info : Listening on port 3333 for gdb connections

doc/conf.py

@@ -392,16 +392,16 @@
 		('boards/nios2/altera_max10/doc/board', 'boards/nios2/altera_max10/doc/index'),
 		('boards/nios2/qemu_nios2/doc/board', 'boards/nios2/qemu_nios2/doc/index'),
 		('boards/posix/native_posix/doc/board', 'boards/posix/native_posix/doc/index'),
-		('boards/riscv32/hifive1/doc/hifive1', 'boards/riscv/hifive1/doc/index'),
-		('boards/riscv32/m2gl025_miv/doc/m2g1025_miv', 'boards/riscv/m2gl025_miv/doc/index'),
-		('boards/riscv32/qemu_riscv32/doc/board', 'boards/riscv/qemu_riscv32/doc/index'),
-		('boards/riscv32/zedboard_pulpino/doc/zedboard_pulpino', 'boards/riscv/zedboard_pulpino/doc/index'),
-                ('boards/riscv32/hifive1/doc/index', 'boards/riscv/hifive1/doc/index'),
-                ('boards/riscv32/hifive1_revb/doc/index', 'boards/riscv/hifive1_revb/doc/index'),
-                ('boards/riscv32/litex_vexriscv/doc/litex_vexriscv', 'boards/riscv/litex_vexriscv/doc/litex_vexriscv'),
-                ('boards/riscv32/m2gl025_miv/doc/index', 'boards/riscv/m2gl025_miv/doc/index'),
-                ('boards/riscv32/qemu_riscv32/doc/index', 'boards/riscv/qemu_riscv32/doc/index'),
-                ('boards/riscv32/rv32m1_vega/doc/index', 'boards/riscv/rv32m1_vega/doc/index'),
+		('boards/riscv/hifive1/doc/hifive1', 'boards/riscv/hifive1/doc/index'),
+		('boards/riscv/m2gl025_miv/doc/m2g1025_miv', 'boards/riscv/m2gl025_miv/doc/index'),
+		('boards/riscv/qemu_riscv32/doc/board', 'boards/riscv/qemu_riscv32/doc/index'),
+		('boards/riscv/zedboard_pulpino/doc/zedboard_pulpino', 'boards/riscv/zedboard_pulpino/doc/index'),
+                ('boards/riscv/hifive1/doc/index', 'boards/riscv/hifive1/doc/index'),
+                ('boards/riscv/hifive1_revb/doc/index', 'boards/riscv/hifive1_revb/doc/index'),
+                ('boards/riscv/litex_vexriscv/doc/litex_vexriscv', 'boards/riscv/litex_vexriscv/doc/litex_vexriscv'),
+                ('boards/riscv/m2gl025_miv/doc/index', 'boards/riscv/m2gl025_miv/doc/index'),
+                ('boards/riscv/qemu_riscv32/doc/index', 'boards/riscv/qemu_riscv32/doc/index'),
+                ('boards/riscv/rv32m1_vega/doc/index', 'boards/riscv/rv32m1_vega/doc/index'),
 		('boards/x86/arduino_101/doc/board', 'boards/x86/arduino_101/doc/index'),
 		('boards/x86/galileo/doc/galileo', 'boards/x86/galileo/doc/index'),
 		('boards/x86/minnowboard/doc/minnowboard', 'boards/x86/minnowboard/doc/index'),