xtensa: sparse: fix address space mismatch

Fix remaining sparse address space mismatch warnings.

Signed-off-by: Guennadi Liakhovetski <[email protected]>

Author: lyakh

soc/xtensa/intel_adsp/ace/power.c

@@ -6,6 +6,7 @@
 #include <zephyr/kernel.h>
 #include <zephyr/pm/pm.h>
 #include <zephyr/device.h>
+#include <zephyr/debug/sparse.h>
 #include <cpu_init.h>
 
 #include <xtensa/corebits.h>
@@ -197,7 +198,8 @@ __imr void pm_state_imr_restore(void)
 {
 	struct imr_layout *imr_layout = (struct imr_layout *)(IMR_LAYOUT_ADDRESS);
 	/* restore lpsram power and contents */
-	bmemcpy(z_soc_uncached_ptr(UINT_TO_POINTER(LP_SRAM_BASE)),
+	bmemcpy(z_soc_uncached_ptr((__sparse_force void __sparse_cache *)
+				   UINT_TO_POINTER(LP_SRAM_BASE)),
 		imr_layout->imr_state.header.imr_ram_storage,
 		LP_SRAM_SIZE);
 

soc/xtensa/intel_adsp/common/include/adsp_debug_window.h

@@ -5,6 +5,7 @@
 #define _ZEPHYR_SOC_INTEL_ADSP_DEBUG_WINDOW
 
 #include <mem_window.h>
+#include <zephyr/debug/sparse.h>
 
 /*
  * SRAM window for debug info (window 2) is organized in slots,
@@ -63,11 +64,10 @@ struct adsp_debug_window {
 	uint8_t slots[ADSP_DW_SLOT_COUNT][ADSP_DW_SLOT_SIZE];
 } __packed;
 
-
-
 #define WIN2_MBASE DT_REG_ADDR(DT_PHANDLE(DT_NODELABEL(mem_window2), memory))
 
 #define ADSP_DW ((volatile struct adsp_debug_window *) \
-		 (z_soc_uncached_ptr((void *)(WIN2_MBASE + WIN2_OFFSET))))
+		 (z_soc_uncached_ptr((__sparse_force void __sparse_cache *) \
+				     (WIN2_MBASE + WIN2_OFFSET))))
 
 #endif