tests: vector_table_relocation: add test for vector table relocation

Add a basic test for vector table relocation to SRAM. This test
verifies that the vector table can be relocated to SRAM and that
the VTOR register correctly points to the SRAM address range.

Signed-off-by: Martin Hoff <[email protected]>

Author: Martinhoff-maker

tests/application_development/vector_table_relocation/CMakeLists.txt

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+# Copyright (c) 2025 Silicon Laboratories Inc.
+# SPDX-License-Identifier: Apache-2.0
+
+cmake_minimum_required(VERSION 3.20.0)
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+
+project(vector_table_relocation)
+
+FILE(GLOB app_sources src/*.c)
+target_sources(app PRIVATE ${app_sources})

tests/application_development/vector_table_relocation/README.rst

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+.. _vector_table_relocation:
+
+Vector table relocation
+#################
+
+Overview
+********
+A simple test that demonstrates the vector table relocation feature.

tests/application_development/vector_table_relocation/prj.conf

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+CONFIG_COVERAGE=n
+CONFIG_ZTEST=y
+CONFIG_SRAM_VECTOR_TABLE=y

tests/application_development/vector_table_relocation/src/main.c

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+/*
+ * Copyright (c) 2025 Silicon Laboratories Inc.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#if !defined(CONFIG_CPU_CORTEX_M)
+#error project can only run on Cortex-M
+#endif
+
+#include <zephyr/kernel.h>
+#include <zephyr/sys/printk.h>
+#include <zephyr/ztest.h>
+
+#ifdef SCB_VTOR_TBLBASE_Msk
+#define VTOR_MASK (SCB_VTOR_TBLBASE_Msk | SCB_VTOR_TBLOFF_Msk)
+#else
+#define VTOR_MASK SCB_VTOR_TBLOFF_Msk
+#endif
+
+/* This function will allow execute from sram region.
+ * This is needed only for this sample because by default all soc will
+ * disable the execute from SRAM.
+ * An application that requires that the code be executed from SRAM will
+ *  have to configure the region appropriately in arm_mpu_regions.c.
+ */
+
+#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_SYSMPU))
+#include <cmsis_core.h>
+void disable_mpu_rasr_xn(void)
+{
+	uint32_t index;
+	/* Kept the max index as 8(irrespective of soc) because the sram
+	 * would most likely be set at index 2.
+	 */
+	for (index = 0U; index < 8; index++) {
+		MPU->RNR = index;
+#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
+		if (MPU->RBAR & MPU_RBAR_XN_Msk) {
+			MPU->RBAR ^= MPU_RBAR_XN_Msk;
+		}
+#else
+		if (MPU->RASR & MPU_RASR_XN_Msk) {
+			MPU->RASR ^= MPU_RASR_XN_Msk;
+		}
+#endif /* CONFIG_ARMV8_M_BASELINE || CONFIG_ARMV8_M_MAINLINE */
+	}
+}
+#endif /* CONFIG_ARM_MPU */
+
+ZTEST(vector_table_relocation, test_vector_table_in_ram)
+{
+	/* Check that VTOR register effectively point to a RAM based location */
+	volatile uint32_t vtor_address = SCB->VTOR & VTOR_MASK;
+
+	printf("VTOR address: 0x%x\n", vtor_address);
+	zassert_true(vtor_address >= CONFIG_SRAM_BASE_ADDRESS &&
+			     vtor_address <= CONFIG_SRAM_BASE_ADDRESS + CONFIG_SRAM_SIZE,
+		     "Vector table is not in RAM! Address: 0x%x", vtor_address);
+}
+
+void *relocate_code_setup(void)
+{
+#if (defined(CONFIG_ARM_MPU) && !defined(CONFIG_CPU_HAS_NXP_SYSMPU))
+	disable_mpu_rasr_xn();
+#endif /* CONFIG_ARM_MPU */
+	return NULL;
+}
+
+ZTEST_SUITE(vector_table_relocation, NULL, relocate_code_setup, NULL, NULL, NULL);

tests/application_development/vector_table_relocation/testcase.yaml

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+common:
+  tags: linker
+tests:
+  application_development.vector_table_relocation.arm:
+    arch_allow: arm
+    filter: CONFIG_CPU_CORTEX_M_HAS_VTOR
+    # Exclude mps3/corstone310 because it uses another mechanism to support relocation
+    # of the vector table (CONFIG_ROMSTART_RELOCATION_ROM).
+    platform_exclude: mps3/corstone310