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18 | 18 | #include <hal/emac_hal.h>
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19 | 19 | #include <hal/emac_ll.h>
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20 | 20 | #include <soc/rtc.h>
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| 21 | +#include <soc/io_mux_reg.h> |
| 22 | +#include <clk_ctrl_os.h> |
21 | 23 |
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22 | 24 | #include "eth.h"
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23 | 25 |
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@@ -200,6 +202,35 @@ static void phy_link_state_changed(const struct device *phy_dev,
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200 | 202 | }
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201 | 203 | }
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202 | 204 |
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| 205 | +#if DT_INST_NODE_HAS_PROP(0, ref_clk_output_gpios) |
| 206 | +static int emac_config_apll_clock(void) |
| 207 | +{ |
| 208 | + uint32_t expt_freq = MHZ(50); |
| 209 | + uint32_t real_freq = 0; |
| 210 | + esp_err_t ret = periph_rtc_apll_freq_set(expt_freq, &real_freq); |
| 211 | + |
| 212 | + if (ret == ESP_ERR_INVALID_ARG) { |
| 213 | + LOG_ERR("Set APLL clock coefficients failed"); |
| 214 | + return -EIO; |
| 215 | + } |
| 216 | + |
| 217 | + if (ret == ESP_ERR_INVALID_STATE) { |
| 218 | + LOG_INF("APLL is occupied already, it is working at %d Hz", real_freq); |
| 219 | + } |
| 220 | + |
| 221 | + /* If the difference of real APLL frequency |
| 222 | + * is not within 50 ppm, i.e. 2500 Hz, |
| 223 | + * the APLL is unavailable |
| 224 | + */ |
| 225 | + if (abs((int)real_freq - (int)expt_freq) > 2500) { |
| 226 | + LOG_ERR("The APLL is working at an unusable frequency"); |
| 227 | + return -EIO; |
| 228 | + } |
| 229 | + |
| 230 | + return 0; |
| 231 | +} |
| 232 | +#endif /* DT_INST_NODE_HAS_PROP(0, ref_clk_output_gpios) */ |
| 233 | + |
203 | 234 | int eth_esp32_initialize(const struct device *dev)
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204 | 235 | {
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205 | 236 | struct eth_esp32_dev_data *const dev_data = dev->data;
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@@ -253,10 +284,14 @@ int eth_esp32_initialize(const struct device *dev)
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253 | 284 | DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 17,
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254 | 285 | "Only GPIO16/17 are allowed as a GPIO REF_CLK source!");
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255 | 286 | int ref_clk_gpio = DT_INST_GPIO_PIN(0, ref_clk_output_gpios);
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256 |
| - |
257 | 287 | emac_hal_iomux_rmii_clk_output(ref_clk_gpio);
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258 | 288 | emac_ll_clock_enable_rmii_output(dev_data->hal.ext_regs);
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259 |
| - rtc_clk_apll_enable(true, 0, 0, 6, 2); |
| 289 | + periph_rtc_apll_acquire(); |
| 290 | + res = emac_config_apll_clock(); |
| 291 | + if (res != 0) { |
| 292 | + goto err; |
| 293 | + } |
| 294 | + rtc_clk_apll_enable(true); |
260 | 295 | #else
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261 | 296 | emac_hal_iomux_rmii_clk_input();
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262 | 297 | emac_ll_clock_enable_rmii_input(dev_data->hal.ext_regs);
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