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drivers: eth_esp32: fix function call as from hal
When external PHY has crystal, ESP32 can be configured to use custom GPIO as clock source for it. However, due to latest clock subsystem and hal updates, current driver fails to build and blocks its usage. Signed-off-by: Sylvio Alves <[email protected]>
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+38
-3
lines changed

2 files changed

+38
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drivers/ethernet/eth_esp32.c

+37-2
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,8 @@
1818
#include <hal/emac_hal.h>
1919
#include <hal/emac_ll.h>
2020
#include <soc/rtc.h>
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#include <soc/io_mux_reg.h>
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#include <clk_ctrl_os.h>
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2224
#include "eth.h"
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@@ -200,6 +202,35 @@ static void phy_link_state_changed(const struct device *phy_dev,
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}
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}
202204

205+
#if DT_INST_NODE_HAS_PROP(0, ref_clk_output_gpios)
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static int emac_config_apll_clock(void)
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{
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uint32_t expt_freq = MHZ(50);
209+
uint32_t real_freq = 0;
210+
esp_err_t ret = periph_rtc_apll_freq_set(expt_freq, &real_freq);
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212+
if (ret == ESP_ERR_INVALID_ARG) {
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LOG_ERR("Set APLL clock coefficients failed");
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return -EIO;
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}
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if (ret == ESP_ERR_INVALID_STATE) {
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LOG_INF("APLL is occupied already, it is working at %d Hz", real_freq);
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}
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/* If the difference of real APLL frequency
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* is not within 50 ppm, i.e. 2500 Hz,
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* the APLL is unavailable
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*/
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if (abs((int)real_freq - (int)expt_freq) > 2500) {
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LOG_ERR("The APLL is working at an unusable frequency");
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return -EIO;
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}
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return 0;
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}
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#endif /* DT_INST_NODE_HAS_PROP(0, ref_clk_output_gpios) */
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203234
int eth_esp32_initialize(const struct device *dev)
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{
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struct eth_esp32_dev_data *const dev_data = dev->data;
@@ -253,10 +284,14 @@ int eth_esp32_initialize(const struct device *dev)
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DT_INST_GPIO_PIN(0, ref_clk_output_gpios) == 17,
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"Only GPIO16/17 are allowed as a GPIO REF_CLK source!");
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int ref_clk_gpio = DT_INST_GPIO_PIN(0, ref_clk_output_gpios);
256-
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emac_hal_iomux_rmii_clk_output(ref_clk_gpio);
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emac_ll_clock_enable_rmii_output(dev_data->hal.ext_regs);
259-
rtc_clk_apll_enable(true, 0, 0, 6, 2);
289+
periph_rtc_apll_acquire();
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res = emac_config_apll_clock();
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if (res != 0) {
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goto err;
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}
294+
rtc_clk_apll_enable(true);
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#else
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emac_hal_iomux_rmii_clk_input();
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emac_ll_clock_enable_rmii_input(dev_data->hal.ext_regs);

west.yml

+1-1
Original file line numberDiff line numberDiff line change
@@ -157,7 +157,7 @@ manifest:
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groups:
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- hal
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- name: hal_espressif
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revision: 99dce9490ef4a84ddffe75c9d8853b30008c64bc
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revision: e4e8df61b371554f4ce08d203426d7875421666e
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path: modules/hal/espressif
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west-commands: west/west-commands.yml
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groups:

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