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decsnykartben
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tests: spi_loopback: Fix frdm_ke17z overlay
The ke17z overlay for this test is incorrect in that the chip select line sent to the spi pins on the header is PCS1, not PCS0. This is having no functional effect on the test right now but soon I am trying to implement a chip select test, and regardless it helps to have the CS actually toggle right now for debugging purposes. Also, I checked the frdm_ke17z512 and it looks like the board pinctrl file is configuring for PCS2, so I fixed that as well because it looks also like the same mistake, but I don't have that hardware. Signed-off-by: Declan Snyder <[email protected]>
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tests/drivers/spi/spi_loopback/boards/frdm_ke17z.overlay

+4-4
Original file line numberDiff line numberDiff line change
@@ -9,14 +9,14 @@
99
*/
1010

1111
&lpspi0 {
12-
slow@0 {
12+
slow@1 {
1313
compatible = "test-spi-loopback-slow";
14-
reg = <0>;
14+
reg = <1>;
1515
spi-max-frequency = <500000>;
1616
};
17-
fast@0 {
17+
fast@1 {
1818
compatible = "test-spi-loopback-fast";
19-
reg = <0>;
19+
reg = <1>;
2020
spi-max-frequency = <16000000>;
2121
};
2222
};

tests/drivers/spi/spi_loopback/boards/frdm_ke17z512.overlay

+4-4
Original file line numberDiff line numberDiff line change
@@ -9,14 +9,14 @@
99
*/
1010

1111
&lpspi0 {
12-
slow@0 {
12+
slow@2 {
1313
compatible = "test-spi-loopback-slow";
14-
reg = <0>;
14+
reg = <2>;
1515
spi-max-frequency = <500000>;
1616
};
17-
fast@0 {
17+
fast@2 {
1818
compatible = "test-spi-loopback-fast";
19-
reg = <0>;
19+
reg = <2>;
2020
spi-max-frequency = <16000000>;
2121
};
2222
};

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