tests: drivers: spi loopback on stm32h7 SRAM2 memory

Configure the SRAM2 of the stm32h7x serie with NOCACHE attribute
to run the tests/drivers/spi/spi_loopback
Connect D11 to D12 to PASS the test

Signed-off-by: Francois Ramu <[email protected]>

Author: FRASTM

tests/drivers/spi/spi_loopback/boards/nucleo_h723zg.overlay

@@ -4,6 +4,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
+&sram2 {
+	zephyr,memory-attr = "RAM_NOCACHE";
+};
+
 /* Set div-q to get test clk freq into acceptable SPI freq range */
 &pll {
 	/delete-property/ div-q;

tests/drivers/spi/spi_loopback/boards/nucleo_h743zi.overlay

@@ -4,6 +4,10 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
+&sram2 {
+	zephyr,memory-attr = "RAM_NOCACHE";
+};
+
 &spi1 {
 	dmas = <&dmamux1 0 38 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)
 		&dmamux1 1 37 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;

tests/drivers/spi/spi_loopback/boards/nucleo_h753zi.conf

@@ -0,0 +1 @@
+CONFIG_NOCACHE_MEMORY=y

tests/drivers/spi/spi_loopback/boards/nucleo_h753zi.overlay

@@ -0,0 +1,37 @@
+/*
+ * Copyright (c) 2021 STMicroelectronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&sram2 {
+	zephyr,memory-attr = "RAM_NOCACHE";
+};
+
+&spi1 {
+	dmas = <&dmamux1 0 38 (STM32_DMA_PERIPH_TX | STM32_DMA_PRIORITY_HIGH)
+		&dmamux1 1 37 (STM32_DMA_PERIPH_RX | STM32_DMA_PRIORITY_HIGH)>;
+	dma-names = "tx", "rx";
+	slow@0 {
+		compatible = "test-spi-loopback-slow";
+		reg = <0>;
+		spi-max-frequency = <500000>;
+	};
+	fast@0 {
+		compatible = "test-spi-loopback-fast";
+		reg = <0>;
+		spi-max-frequency = <16000000>;
+	};
+};
+
+&dma1 {
+	status = "okay";
+};
+
+&dma2 {
+	status = "okay";
+};
+
+&dmamux1 {
+	status = "okay";
+};

tests/drivers/spi/spi_loopback/src/spi.c

@@ -38,13 +38,20 @@ static struct spi_dt_spec spi_slow = SPI_DT_SPEC_GET(SPI_SLOW_DEV, SPI_OP, 0);
 #define BUF_SIZE 17
 #define BUF2_SIZE 36
 
-#if CONFIG_NOCACHE_MEMORY
+#ifdef CONFIG_NOCACHE_MEMORY
+
+#ifdef CONFIG_SOC_SERIES_STM32H7X
+#define CACHE_SECTION __attribute__((__section__("SRAM2")))
+#else
+#define CACHE_SECTION __attribute__((__section__(".nocache")))
+#endif /* CONFIG_SOC_SERIES_STM32H7X */
+
 static const char tx_data[BUF_SIZE] = "0123456789abcdef\0";
-static __aligned(32) char buffer_tx[BUF_SIZE] __used __attribute__((__section__(".nocache")));
-static __aligned(32) char buffer_rx[BUF_SIZE] __used __attribute__((__section__(".nocache")));
+static __aligned(32) char buffer_tx[BUF_SIZE] __used CACHE_SECTION;
+static __aligned(32) char buffer_rx[BUF_SIZE] __used CACHE_SECTION;
 static const char tx2_data[BUF2_SIZE] = "Thequickbrownfoxjumpsoverthelazydog\0";
-static __aligned(32) char buffer2_tx[BUF2_SIZE] __used __attribute__((__section__(".nocache")));
-static __aligned(32) char buffer2_rx[BUF2_SIZE] __used __attribute__((__section__(".nocache")));
+static __aligned(32) char buffer2_tx[BUF2_SIZE] __used CACHE_SECTION;
+static __aligned(32) char buffer2_rx[BUF2_SIZE] __used CACHE_SECTION;
 #else
 /* this src memory shall be in RAM to support using as a DMA source pointer.*/
 static uint8_t buffer_tx[] = "0123456789abcdef\0";
@@ -598,6 +605,7 @@ static void *spi_loopback_setup(void)
 	memset(buffer2_tx, 0, sizeof(buffer2_tx));
 	memcpy(buffer2_tx, tx2_data, sizeof(tx2_data));
 #endif
+
 	return NULL;
 }