drivers/i2c: Add I2C driver of it51xxx

Implement the functions of I2C host and target.
I2CM: supports nine hosts and each one able located at I2C interface
      0~12.
      supports two 32 bytes dedicated FIFO mode for read and write.
I2CS: supports three targets and each one able located at I2C
      interface 0~8.
      supports 16 bytes dedicated FIFO mode that only supports write or
      read mode and the maximum buffer size is 256 bytes.
      support non-FIFO write to shared FIFO read mode. The maximum
      shared FIFO size for read is 256 bytes.
The APIs test include: i2c_write(), i2c_read(), i2c_burst_read(),
                       i2c_burst_write(), i2c_write_read()

Signed-off-by: Tim Lin <[email protected]>

Author: GTLin08

boards/ite/it515xx_evb/it515xx_evb.dts

@@ -15,6 +15,7 @@
 	compatible = "ite,it515xx-evb";
 
 	aliases {
+		i2c-0 = &i2c0;
 		led0 = &led0;
 		watchdog0 = &twd0;
 	};
@@ -38,6 +39,14 @@
 	};
 };
 
+&i2c0 {
+	status = "okay";
+	clock-frequency = <I2C_BITRATE_STANDARD>;
+	pinctrl-0 = <&i2c0_clk_gpf2_default
+		     &i2c0_data_gpf3_default>;
+	pinctrl-names = "default";
+};
+
 &uart1 {
 	status = "okay";
 	current-speed = <115200>;

boards/ite/it515xx_evb/it515xx_evb.yaml

@@ -8,6 +8,7 @@ ram: 128
 supported:
   - flash
   - gpio
+  - i2c
   - pinctrl
   - pm
   - uart

drivers/i2c/CMakeLists.txt

@@ -38,6 +38,7 @@ zephyr_library_sources_ifdef(CONFIG_I2C_INFINEON_CAT1	i2c_ifx_cat1.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_INFINEON_XMC4	i2c_ifx_xmc4.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_IPROC		i2c_bcm_iproc.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_ITE_ENHANCE	i2c_ite_enhance.c)
+zephyr_library_sources_ifdef(CONFIG_I2C_ITE_IT51XXX	i2c_ite_it51xxx.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_ITE_IT8XXX2	i2c_ite_it8xxx2.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_LITEX		i2c_litex.c)
 zephyr_library_sources_ifdef(CONFIG_I2C_LITEX_LITEI2C	i2c_litex_litei2c.c)

drivers/i2c/Kconfig

@@ -132,6 +132,7 @@ source "drivers/i2c/Kconfig.gpio"
 source "drivers/i2c/Kconfig.i2c_emul"
 source "drivers/i2c/Kconfig.ifx_cat1"
 source "drivers/i2c/Kconfig.ifx_xmc4"
+source "drivers/i2c/Kconfig.it51xxx"
 source "drivers/i2c/Kconfig.it8xxx2"
 source "drivers/i2c/Kconfig.litex"
 source "drivers/i2c/Kconfig.lpc11u6x"

drivers/i2c/Kconfig.it51xxx

@@ -0,0 +1,51 @@
+# Copyright (c) 2025 ITE Corporation. All Rights Reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+config I2C_ITE_IT51XXX
+	bool "ITE IT51XXX I2C driver"
+	default y
+	depends on DT_HAS_ITE_IT51XXX_I2C_ENABLED
+	select PINCTRL
+	select I2C_BITBANG
+	help
+	  Enable I2C support on IT51XXX series.
+	  Supports nine hosts and three targets and each one able to located
+	  at I2C interface0~8.
+	  Three I2C targets on design A, B and C. Support 16 bytes dedicated
+	  FIFO mode for read/write.
+	  Supported Speeds: 50kHz, 100kHz, 400kHz and 1MHz.
+	  This driver supports repeated start.
+
+if I2C_ITE_IT51XXX
+
+config I2C_IT51XXX_FIFO_MODE
+	bool "IT51XXX I2C FIFO mode"
+	default y
+	help
+	  This is an option to enable FIFO mode which can reduce the time
+	  between each byte to improve the I2C bus clock stretching during
+	  I2C transaction.
+	  The I2C controller supports two 32-bytes FIFOs,
+	  FIFO1 supports I2C 0, and FIFO2 supports other ports.
+	  I2C FIFO mode of IT51XXX can support I2C APIs including:
+	  i2c_write(), i2c_read(), i2c_burst_read.
+
+endif # I2C_ITE_IT51XXX
+
+if I2C_TARGET
+
+config I2C_TARGET_IT51XXX_MAX_BUF_SIZE
+	int "It is allowed to configure the dedicated FIFO size up to 256 bytes."
+	default 256
+
+config I2C_IT51XXX_MAX_SHARE_FIFO_SIZE
+	int "It is allowed to configure the shared FIFO size up to 256 bytes."
+	range 16 256
+	default 256
+
+config SOC_IT51XXX_CPU_IDLE_GATING
+	default y
+	help
+	  This option is used when the I2C target shared FIFO property is enabled.
+
+endif # I2C_TARGET