Skip to content

Commit c235144

Browse files
parthitcenashif
parthitce
authored and
nashif
committed
boards: arm: Add Dragino NBSN95 NB-IoT node
add board support for Dragino NBSN95 NB-IoT sensor node. Initial support only includes UART (with followup patches on BC95 and other peripherals) Signed-off-by: Parthiban Nallathambi <[email protected]>
1 parent 36db386 commit c235144

File tree

9 files changed

+346
-0
lines changed

9 files changed

+346
-0
lines changed

‎boards/arm/dragino_nbsn95/Kconfig.board

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# Dragino NBSN95 NB-IoT Sensor Node board configuration
2+
3+
# Copyright (c) 2021 Next Big Thing AG
4+
# SPDX-License-Identifier: Apache-2.0
5+
6+
config BOARD_DRAGINO_NBSN95
7+
bool "Dragino NBSN95 Sensor Node"
8+
depends on SOC_STM32L072XX

‎boards/arm/dragino_nbsn95/Kconfig.defconfig

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
# Dragino NBSN95 NB-IoT Sensor Node board configuration
2+
3+
# Copyright (c) 2021 Next Big Thing AG
4+
# SPDX-License-Identifier: Apache-2.0
5+
6+
if BOARD_DRAGINO_NBSN95
7+
8+
config BOARD
9+
default "dragino_nbsn95"
10+
11+
endif # BOARD_DRAGINO_NBSN95

‎boards/arm/dragino_nbsn95/board.cmake

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
# SPDX-License-Identifier: Apache-2.0
2+
3+
board_runner_args(jlink "--device=STM32L072CZ" "--speed=4000")
4+
5+
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
6+
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/arm/dragino_nbsn95/doc/img/dragino_nbsn95.png

513 KB
Loading

‎boards/arm/dragino_nbsn95/doc/index.rst

Lines changed: 195 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,195 @@
1+
.. _dragino_nbsn95_board:
2+
3+
Dragino NBSN95 NB-IoT Sensor Node
4+
#################################
5+
6+
Overview
7+
********
8+
9+
The Dragino NBSN95 NB-IoT Sensor Node for IoT allows users to develop
10+
applications with NB-IoT connectivity via the Quectel BC95-G.
11+
Dragino NBSN95 enables a wide diversity of applications by exploiting
12+
low-power communication, ARM |reg| Cortex |reg|-M0 core-based
13+
STM32L0 Series features.
14+
15+
This kit provides:
16+
17+
- STM32L072CZ MCU
18+
- Quectel BC95-G NB-IoT
19+
- Expansion connectors:
20+
- PMOD
21+
- Li/SOCI2 Unchargable Battery
22+
- GPIOs exposed via screw terminals on the carrier board
23+
- Housing
24+
25+
.. image:: img/dragino_nbsn95.png
26+
:width: 531px
27+
:align: center
28+
:height: 354px
29+
:alt: Dragino NBSN95
30+
31+
More information about the board can be found at the `Dragino NBSN95 website`_.
32+
33+
Hardware
34+
********
35+
36+
The STM32L072CZ SoC provides the following hardware IPs:
37+
38+
- Ultra-low-power (down to 0.29 µA Standby mode and 93 uA/MHz run mode)
39+
- Core: ARM |reg| 32-bit Cortex |reg|-M0+ CPU, frequency up to 32 MHz
40+
- Clock Sources:
41+
42+
- 1 to 32 MHz crystal oscillator
43+
- 32 kHz crystal oscillator for RTC (LSE)
44+
- Internal 16 MHz factory-trimmed RC ( |plusminus| 1%)
45+
- Internal low-power 37 kHz RC ( |plusminus| 5%)
46+
- Internal multispeed low-power 65 kHz to 4.2 MHz RC
47+
- RTC with HW calendar, alarms and calibration
48+
- Up to 24 capacitive sensing channels: support touchkey, linear and rotary touch sensors
49+
- 11x timers:
50+
51+
- 2x 16-bit with up to 4 channels
52+
- 2x 16-bit with up to 2 channels
53+
- 1x 16-bit ultra-low-power timer
54+
- 1x SysTick
55+
- 1x RTC
56+
- 2x 16-bit basic for DAC
57+
- 2x watchdogs (independent/window)
58+
- Up to 84 fast I/Os, most 5 V-tolerant.
59+
- Memories
60+
61+
- Up to 192 KB Flash, 2 banks read-while-write, proprietary code readout protection
62+
- Up to 20 KB of SRAM
63+
- External memory interface for static memories supporting SRAM, PSRAM, NOR and NAND memories
64+
- Rich analog peripherals (independent supply)
65+
66+
- 1x 12-bit ADC 1.14 MSPS
67+
- 2x 12-bit DAC
68+
- 2x ultra-low-power comparators
69+
- 11x communication interfaces
70+
71+
- USB OTG 2.0 full-speed, LPM and BCD
72+
- 3x I2C FM+(1 Mbit/s), SMBus/PMBus
73+
- 4x USARTs (ISO 7816, LIN, IrDA, modem)
74+
- 6x SPIs (4x SPIs with the Quad SPI)
75+
- 7-channel DMA controller
76+
- True random number generator
77+
- CRC calculation unit, 96-bit unique ID
78+
- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell |trade|
79+
80+
81+
More information about STM32L072CZ can be found here:
82+
83+
- `STM32L072CZ on www.st.com`_
84+
- `STM32L0x2 reference manual`_
85+
86+
Supported Features
87+
==================
88+
89+
The Zephyr Dragino NBSN95 Board board configuration supports the following hardware features:
90+
91+
+-----------+------------+-------------------------------------+
92+
| Interface | Controller | Driver/Component |
93+
+===========+============+=====================================+
94+
| UART | on-chip | serial port-polling; |
95+
| | | serial port-interrupt |
96+
+-----------+------------+-------------------------------------+
97+
| PINMUX | on-chip | pinmux |
98+
+-----------+------------+-------------------------------------+
99+
| GPIO | on-chip | gpio |
100+
+-----------+------------+-------------------------------------+
101+
102+
Other hardware features are not yet supported on this Zephyr port.
103+
104+
The default configuration can be found in the defconfig file:
105+
106+
``boards/arm/dragino_nbsn95/dragino_nbsn95_defconfig``
107+
108+
109+
Connections and IOs
110+
===================
111+
112+
Dragino NBSN95 Board has GPIO controllers. These controllers are responsible for pin muxing,
113+
input/output, pull-up, etc.
114+
115+
Available pins:
116+
---------------
117+
118+
For detailed information about available pins please refer to `Dragino NBSN95 website`_.
119+
120+
Default Zephyr Peripheral Mapping:
121+
----------------------------------
122+
123+
- UART_1_TX : PB6
124+
- UART_1_RX : PB7
125+
- UART_2_TX : PA2
126+
- UART_2_RX : PA3
127+
128+
System Clock
129+
------------
130+
131+
Dragino NBSN95 System Clock is at 32MHz,
132+
133+
Serial Port
134+
-----------
135+
136+
Dragino NBSN95 board has 2 U(S)ARTs. The Zephyr console output is assigned to UART1.
137+
Default settings are 115200 8N1.
138+
139+
Programming and Debugging
140+
*************************
141+
142+
Applications for the ``dragino_nbsn95`` board configuration can be built and
143+
flashed in the usual way (see :ref:`build_an_application` and
144+
:ref:`application_run` for more details).
145+
146+
Flashing
147+
========
148+
149+
Dragino NBSN95 board requires an external debugger.
150+
151+
Flashing an application to Dragino NBSN95
152+
-----------------------------------------
153+
154+
Here is an example for the :ref:`hello_world` application.
155+
156+
Connect the Dragino NBSN95 to a STLinkV2 to your host computer using the USB port, then
157+
run a serial host program to connect with your board. For example:
158+
159+
.. code-block:: console
160+
161+
$ minicom -D /dev/ttyACM0
162+
163+
Then build and flash the application:
164+
165+
.. zephyr-app-commands::
166+
:zephyr-app: samples/hello_world
167+
:board: dragino_nbsn95
168+
:goals: build flash
169+
170+
You should see the following message on the console:
171+
172+
.. code-block:: console
173+
174+
$ Hello World! dragino_nbsn95
175+
176+
Debugging
177+
=========
178+
179+
You can debug an application in the usual way. Here is an example for the
180+
:ref:`hello_world` application.
181+
182+
.. zephyr-app-commands::
183+
:zephyr-app: samples/hello_world
184+
:board: dragino_nbsn95
185+
:maybe-skip-config:
186+
:goals: debug
187+
188+
.. _Dragino NBSN95 website:
189+
https://www.dragino.com/products/nb-iot/item/163-nbsn95.html
190+
191+
.. _STM32L072CZ on www.st.com:
192+
http://www.st.com/en/microcontrollers/stm32l072cz.html
193+
194+
.. _STM32L0x2 reference manual:
195+
http://www.st.com/resource/en/reference_manual/DM00108281.pdf

‎boards/arm/dragino_nbsn95/dragino_nbsn95.dts

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,64 @@
1+
/*
2+
* Copyright (c) 2021 Next Big Thing AG
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/dts-v1/;
8+
#include <st/l0/stm32l072Xz.dtsi>
9+
#include <st/l0/stm32l072c(b-z)tx-pinctrl.dtsi>
10+
11+
/ {
12+
model = "Dragino NBSN95 NB-IoT Sensor Node";
13+
compatible = "vendor,dragino";
14+
15+
chosen {
16+
zephyr,console = &usart2;
17+
zephyr,shell-uart = &usart2;
18+
zephyr,sram = &sram0;
19+
zephyr,flash = &flash0;
20+
};
21+
22+
leds {
23+
compatible = "gpio-leds";
24+
green_led: led {
25+
gpios = <&gpioa 8 GPIO_ACTIVE_HIGH>;
26+
label = "User LD1";
27+
};
28+
};
29+
30+
aliases {
31+
led0 = &green_led;
32+
};
33+
};
34+
35+
&clk_hsi {
36+
status = "okay";
37+
};
38+
39+
&pll {
40+
div = <2>;
41+
mul = <4>;
42+
clocks = <&clk_hsi>;
43+
status = "okay";
44+
};
45+
46+
&rcc {
47+
clocks = <&pll>;
48+
clock-frequency = <DT_FREQ_M(32)>;
49+
ahb-prescaler = <1>;
50+
apb1-prescaler = <1>;
51+
apb2-prescaler = <1>;
52+
};
53+
54+
&usart1 {
55+
pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
56+
current-speed = <115200>;
57+
status = "okay";
58+
};
59+
60+
&usart2 {
61+
pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
62+
current-speed = <115200>;
63+
status = "okay";
64+
};

‎boards/arm/dragino_nbsn95/dragino_nbsn95.yaml

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
identifier: dragino_nbsn95
2+
name: Dragino NBSN95 NB-IoT Sensor Node
3+
type: mcu
4+
arch: arm
5+
toolchain:
6+
- zephyr
7+
- gnuarmemb
8+
- xtools
9+
ram: 20
10+
flash: 192
11+
testing:
12+
ignore_tags:
13+
- net

‎boards/arm/dragino_nbsn95/dragino_nbsn95_defconfig

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
# SPDX-License-Identifier: Apache-2.0
2+
3+
# Zephyr Kernel Configuration
4+
CONFIG_SOC_SERIES_STM32L0X=y
5+
6+
# Platform Configuration
7+
CONFIG_SOC_STM32L072XX=y
8+
CONFIG_BOARD_DRAGINO_NBSN95=y
9+
10+
# Serial Drivers
11+
CONFIG_SERIAL=y
12+
CONFIG_UART_INTERRUPT_DRIVEN=y
13+
# enable console
14+
CONFIG_CONSOLE=y
15+
CONFIG_UART_CONSOLE=y
16+
17+
# Pinmux Driver
18+
CONFIG_PINMUX=y
19+
20+
# GPIO Controller
21+
CONFIG_GPIO=y
22+
23+
# Enable Clocks
24+
CONFIG_CLOCK_CONTROL=y

‎boards/arm/dragino_nbsn95/support/openocd.cfg

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
# SPDX-License-Identifier: Apache-2.0
2+
#
3+
# Copyright (c) 2021 Next Big Thing AG
4+
5+
source [find interface/stlink.cfg]
6+
7+
transport select hla_swd
8+
9+
set WORKAREASIZE 0x2000
10+
11+
source [find target/stm32l0_dual_bank.cfg]
12+
13+
# There is only system reset line and JTAG/SWD command can be issued when SRST
14+
reset_config srst_only
15+
16+
$_TARGETNAME configure -event gdb-attach {
17+
echo "Debugger attaching: halting execution"
18+
reset halt
19+
gdb_breakpoint_override hard
20+
}
21+
22+
$_TARGETNAME configure -event gdb-detach {
23+
echo "Debugger detaching: resuming execution"
24+
resume
25+
}

0 commit comments

Comments
 (0)