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| 1 | +/* |
| 2 | + * Copyright (c) 2025 Silicon Laboratories Inc. |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +#include <errno.h> |
| 8 | +#include <zephyr/irq.h> |
| 9 | +#include <zephyr/sys/util.h> |
| 10 | +#include <zephyr/sys/util_macro.h> |
| 11 | +#include <zephyr/device.h> |
| 12 | +#include <zephyr/devicetree.h> |
| 13 | +#include <zephyr/drivers/pwm.h> |
| 14 | +#include <zephyr/drivers/pinctrl.h> |
| 15 | +#include <zephyr/drivers/clock_control.h> |
| 16 | +#include <zephyr/types.h> |
| 17 | +#include "sl_si91x_pwm.h" |
| 18 | + |
| 19 | +#define DT_DRV_COMPAT silabs_siwx91x_pwm |
| 20 | + |
| 21 | +#define PWM_CHANNELS 4 |
| 22 | +#define DEFAULT_VALUE 0xFF |
| 23 | + |
| 24 | +struct pwm_siwx91x_channel_config { |
| 25 | + uint8_t duty_cycle; |
| 26 | + uint32_t frequency; |
| 27 | + bool is_chan_active; |
| 28 | +}; |
| 29 | + |
| 30 | +struct pwm_siwx91x_config { |
| 31 | + /* Pointer to the clock device structure */ |
| 32 | + const struct device *clock_dev; |
| 33 | + /* Clock control subsystem */ |
| 34 | + clock_control_subsys_t clock_subsys; |
| 35 | + /* Pointer to the pin control device configuration */ |
| 36 | + const struct pinctrl_dev_config *pcfg; |
| 37 | + /* Prescaler information of the channels */ |
| 38 | + uint8_t ch_prescaler[PWM_CHANNELS]; |
| 39 | + /* Common PWM polarity for all the channels */ |
| 40 | + uint8_t pwm_polarity; |
| 41 | +}; |
| 42 | + |
| 43 | +struct pwm_siwx91x_data { |
| 44 | + struct pwm_siwx91x_channel_config pwm_channel_cfg[PWM_CHANNELS]; |
| 45 | +}; |
| 46 | + |
| 47 | +/* Function to convert prescaler value to a programmable reg value */ |
| 48 | +static int siwx91x_prescale_convert(uint8_t prescale) |
| 49 | +{ |
| 50 | + |
| 51 | + switch (prescale) { |
| 52 | + case 1: |
| 53 | + return SL_TIME_PERIOD_PRESCALE_1; |
| 54 | + case 2: |
| 55 | + return SL_TIME_PERIOD_PRESCALE_2; |
| 56 | + case 4: |
| 57 | + return SL_TIME_PERIOD_PRESCALE_4; |
| 58 | + case 8: |
| 59 | + return SL_TIME_PERIOD_PRESCALE_8; |
| 60 | + case 16: |
| 61 | + return SL_TIME_PERIOD_PRESCALE_16; |
| 62 | + case 32: |
| 63 | + return SL_TIME_PERIOD_PRESCALE_32; |
| 64 | + case 64: |
| 65 | + return SL_TIME_PERIOD_PRESCALE_64; |
| 66 | + default: |
| 67 | + return -EINVAL; |
| 68 | + } |
| 69 | +} |
| 70 | + |
| 71 | +/* Program PWM channel with the default configurations */ |
| 72 | +static int siwx91x_default_channel_config(const struct device *dev, uint32_t channel) |
| 73 | +{ |
| 74 | + const struct pwm_siwx91x_config *config = dev->config; |
| 75 | + int prescale_reg_value = siwx91x_prescale_convert(config->ch_prescaler[channel]); |
| 76 | + int ret; |
| 77 | + |
| 78 | + if (prescale_reg_value < 0) { |
| 79 | + return -EINVAL; |
| 80 | + } |
| 81 | + |
| 82 | + ret = sl_si91x_pwm_set_output_mode(SL_MODE_INDEPENDENT, channel); |
| 83 | + if (ret) { |
| 84 | + return -EINVAL; |
| 85 | + } |
| 86 | + |
| 87 | + ret = sl_si91x_pwm_set_base_timer_mode(SL_FREE_RUN_MODE, channel); |
| 88 | + if (ret) { |
| 89 | + return -EINVAL; |
| 90 | + } |
| 91 | + |
| 92 | + ret = sl_si91x_pwm_control_base_timer(SL_BASE_TIMER_EACH_CHANNEL); |
| 93 | + if (ret) { |
| 94 | + return -EINVAL; |
| 95 | + } |
| 96 | + |
| 97 | + ret = sl_si91x_pwm_control_period(SL_TIME_PERIOD_POSTSCALE_1_1, prescale_reg_value, |
| 98 | + channel); |
| 99 | + if (ret) { |
| 100 | + return -EINVAL; |
| 101 | + } |
| 102 | + |
| 103 | + return 0; |
| 104 | +} |
| 105 | + |
| 106 | +static int pwm_siwx91x_set_cycles(const struct device *dev, uint32_t channel, |
| 107 | + uint32_t period_cycles, uint32_t pulse_cycles, pwm_flags_t flags) |
| 108 | +{ |
| 109 | + const struct pwm_siwx91x_config *config = dev->config; |
| 110 | + struct pwm_siwx91x_data *data = dev->data; |
| 111 | + uint32_t prev_period; |
| 112 | + uint32_t duty_cycle; |
| 113 | + int ret; |
| 114 | + |
| 115 | + if (channel >= ARRAY_SIZE(data->pwm_channel_cfg)) { |
| 116 | + return -EINVAL; |
| 117 | + } |
| 118 | + |
| 119 | + if (config->pwm_polarity != flags) { |
| 120 | + /* Polarity mismatch */ |
| 121 | + return -ENOTSUP; |
| 122 | + } |
| 123 | + |
| 124 | + if (data->pwm_channel_cfg[channel].is_chan_active == false) { |
| 125 | + /* Configure the channel with default parameters */ |
| 126 | + ret = siwx91x_default_channel_config(dev, channel); |
| 127 | + if (ret) { |
| 128 | + return -EINVAL; |
| 129 | + } |
| 130 | + } |
| 131 | + |
| 132 | + ret = sl_si91x_pwm_get_time_period(channel, (uint16_t *)&prev_period); |
| 133 | + if (ret) { |
| 134 | + return -EINVAL; |
| 135 | + } |
| 136 | + |
| 137 | + if (period_cycles != prev_period) { |
| 138 | + ret = sl_si91x_pwm_set_time_period(channel, period_cycles, 0); |
| 139 | + if (ret) { |
| 140 | + /* Programmed value must be out of range (>65535) */ |
| 141 | + return -EINVAL; |
| 142 | + } |
| 143 | + } |
| 144 | + |
| 145 | + /* Calculate the duty cycle */ |
| 146 | + duty_cycle = pulse_cycles * 100; |
| 147 | + duty_cycle /= period_cycles; |
| 148 | + |
| 149 | + if (duty_cycle != data->pwm_channel_cfg[channel].duty_cycle) { |
| 150 | + ret = sl_si91x_pwm_set_duty_cycle(pulse_cycles, channel); |
| 151 | + if (ret) { |
| 152 | + return -EINVAL; |
| 153 | + } |
| 154 | + data->pwm_channel_cfg[channel].duty_cycle = duty_cycle; |
| 155 | + } |
| 156 | + |
| 157 | + if (data->pwm_channel_cfg[channel].is_chan_active == false) { |
| 158 | + /* Start PWM after configuring the channel for first time */ |
| 159 | + ret = sl_si91x_pwm_start(channel); |
| 160 | + if (ret) { |
| 161 | + return -EINVAL; |
| 162 | + } |
| 163 | + data->pwm_channel_cfg[channel].is_chan_active = true; |
| 164 | + } |
| 165 | + |
| 166 | + return 0; |
| 167 | +} |
| 168 | + |
| 169 | +static int pwm_siwx91x_get_cycles_per_sec(const struct device *dev, uint32_t channel, |
| 170 | + uint64_t *cycles) |
| 171 | +{ |
| 172 | + struct pwm_siwx91x_data *data = dev->data; |
| 173 | + |
| 174 | + if (channel >= ARRAY_SIZE(data->pwm_channel_cfg)) { |
| 175 | + return -EINVAL; |
| 176 | + } |
| 177 | + |
| 178 | + *cycles = (uint64_t)data->pwm_channel_cfg[channel].frequency; |
| 179 | + |
| 180 | + return 0; |
| 181 | +} |
| 182 | + |
| 183 | +static int pwm_siwx91x_init(const struct device *dev) |
| 184 | +{ |
| 185 | + const struct pwm_siwx91x_config *config = dev->config; |
| 186 | + struct pwm_siwx91x_data *data = dev->data; |
| 187 | + bool polarity_inverted = (config->pwm_polarity == PWM_POLARITY_INVERTED); |
| 188 | + uint32_t pwm_frequency; |
| 189 | + int ret; |
| 190 | + |
| 191 | + ret = clock_control_on(config->clock_dev, config->clock_subsys); |
| 192 | + if (ret) { |
| 193 | + return ret; |
| 194 | + } |
| 195 | + |
| 196 | + ret = clock_control_get_rate(config->clock_dev, config->clock_subsys, &pwm_frequency); |
| 197 | + if (ret) { |
| 198 | + return ret; |
| 199 | + } |
| 200 | + |
| 201 | + ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT); |
| 202 | + if (ret) { |
| 203 | + return ret; |
| 204 | + } |
| 205 | + |
| 206 | + ARRAY_FOR_EACH(data->pwm_channel_cfg, i) { |
| 207 | + data->pwm_channel_cfg[i].frequency = pwm_frequency / config->ch_prescaler[i]; |
| 208 | + } |
| 209 | + |
| 210 | + ret = sl_si91x_pwm_set_output_polarity(polarity_inverted, !polarity_inverted); |
| 211 | + if (ret) { |
| 212 | + return -EINVAL; |
| 213 | + } |
| 214 | + |
| 215 | + return 0; |
| 216 | +} |
| 217 | + |
| 218 | +static DEVICE_API(pwm, pwm_siwx91x_driver_api) = { |
| 219 | + .set_cycles = pwm_siwx91x_set_cycles, |
| 220 | + .get_cycles_per_sec = pwm_siwx91x_get_cycles_per_sec, |
| 221 | +}; |
| 222 | + |
| 223 | +#define SIWX91X_PWM_INIT(inst) \ |
| 224 | + PINCTRL_DT_INST_DEFINE(inst); \ |
| 225 | + static struct pwm_siwx91x_data pwm_siwx91x_data_##inst; \ |
| 226 | + static const struct pwm_siwx91x_config pwm_config_##inst = { \ |
| 227 | + .clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \ |
| 228 | + .clock_subsys = (clock_control_subsys_t)DT_INST_PHA(inst, clocks, clkid), \ |
| 229 | + .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \ |
| 230 | + .ch_prescaler = DT_INST_PROP(inst, silabs_ch_prescaler), \ |
| 231 | + .pwm_polarity = DT_INST_PROP(inst, silabs_pwm_polarity), \ |
| 232 | + }; \ |
| 233 | + DEVICE_DT_INST_DEFINE(inst, &pwm_siwx91x_init, NULL, &pwm_siwx91x_data_##inst, \ |
| 234 | + &pwm_config_##inst, PRE_KERNEL_1, CONFIG_PWM_INIT_PRIORITY, \ |
| 235 | + &pwm_siwx91x_driver_api); |
| 236 | + |
| 237 | +DT_INST_FOREACH_STATUS_OKAY(SIWX91X_PWM_INIT) |
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