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ttmutkartben
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tests: i2c_ram: rtio: Ensure completion queue events get released
Release completion queue events left over from the previous test and make sure a completion queue event gets released after it is consumed. Otherwise newer cqes may be unable to be submitted due to completion queue being full. Signed-off-by: Tahsin Mutlugun <[email protected]>
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tests/drivers/i2c/i2c_ram/src/test_i2c_ram.c

+38-20
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,10 @@ uint8_t rx_data[7];
3535

3636
const struct device *i2c_dev = DEVICE_DT_GET(I2C_DEV_NODE);
3737

38+
#ifdef CONFIG_I2C_RTIO
39+
static void i2c_ram_rtio_before(void);
40+
#endif
41+
3842
/* Address from datasheet is 0b1010xxxr where x bits are additional
3943
* memory address bits and r is the r/w i2c bit.
4044
*
@@ -75,6 +79,10 @@ static void i2c_ram_before(void *f)
7579
addr += ARRAY_SIZE(tx_data) - TX_DATA_OFFSET;
7680
memset(rx_data, 0, ARRAY_SIZE(rx_data));
7781

82+
#ifdef CONFIG_I2C_RTIO
83+
i2c_ram_rtio_before();
84+
#endif
85+
7886
#ifdef CONFIG_PM_DEVICE_RUNTIME
7987
pm_device_runtime_get(i2c_dev);
8088
#endif
@@ -178,6 +186,26 @@ ZTEST(i2c_ram, test_ram_transfer_cb)
178186
I2C_IODEV_DEFINE(i2c_iodev, I2C_DEV_NODE, RAM_ADDR);
179187
RTIO_DEFINE(i2c_rtio, 2, 2);
180188

189+
static void i2c_ram_rtio_before(void)
190+
{
191+
struct rtio_cqe *cqe;
192+
193+
while ((cqe = rtio_cqe_consume(&i2c_rtio))) {
194+
rtio_cqe_release(&i2c_rtio, cqe);
195+
}
196+
}
197+
198+
static void check_completion(struct rtio_cqe *cqe, const char *msg)
199+
{
200+
int32_t result;
201+
202+
result = cqe->result;
203+
rtio_cqe_release(&i2c_rtio, cqe);
204+
if (result) {
205+
zassert_ok(result, msg);
206+
}
207+
}
208+
181209
ZTEST(i2c_ram, test_ram_rtio)
182210
{
183211
struct rtio_sqe *wr_sqe, *rd_sqe;
@@ -190,8 +218,7 @@ ZTEST(i2c_ram, test_ram_rtio)
190218
zassert_ok(rtio_submit(&i2c_rtio, 1), "submit should succeed");
191219

192220
wr_cqe = rtio_cqe_consume(&i2c_rtio);
193-
zassert_ok(wr_cqe->result, "i2c write should succeed");
194-
rtio_cqe_release(&i2c_rtio, wr_cqe);
221+
check_completion(wr_cqe, "i2c write should succeed");
195222

196223
/* Write the address and read the data back */
197224
msgs[0].len = ARRAY_SIZE(rx_cmd);
@@ -209,11 +236,9 @@ ZTEST(i2c_ram, test_ram_rtio)
209236
zassert_ok(rtio_submit(&i2c_rtio, 2), "submit should succeed");
210237

211238
wr_cqe = rtio_cqe_consume(&i2c_rtio);
239+
check_completion(wr_cqe, "i2c write should succeed");
212240
rd_cqe = rtio_cqe_consume(&i2c_rtio);
213-
zassert_ok(wr_cqe->result, "i2c write should succeed");
214-
zassert_ok(rd_cqe->result, "i2c read should succeed");
215-
rtio_cqe_release(&i2c_rtio, wr_cqe);
216-
rtio_cqe_release(&i2c_rtio, rd_cqe);
241+
check_completion(rd_cqe, "i2c read should succeed");
217242

218243
zassert_equal(memcmp(&tx_data[TX_DATA_OFFSET], &rx_data[0], ARRAY_SIZE(rx_data)), 0,
219244
"Written and Read data should match");
@@ -242,11 +267,9 @@ ZTEST(i2c_ram, test_ram_rtio_write_with_transaction)
242267
zassert_ok(rtio_submit(&i2c_rtio, 2), "submit should succeed");
243268

244269
wr_cqe = rtio_cqe_consume(&i2c_rtio);
245-
zassert_ok(wr_cqe->result, "i2c write should succeed");
246-
rtio_cqe_release(&i2c_rtio, wr_cqe);
270+
check_completion(wr_cqe, "i2c write should succeed");
247271
wr_cqe = rtio_cqe_consume(&i2c_rtio);
248-
zassert_ok(wr_cqe->result, "i2c write should succeed");
249-
rtio_cqe_release(&i2c_rtio, wr_cqe);
272+
check_completion(wr_cqe, "i2c write should succeed");
250273

251274
/** Now read the register address to confirm the write was performed */
252275
wr_sqe = rtio_sqe_acquire(&i2c_rtio);
@@ -258,11 +281,9 @@ ZTEST(i2c_ram, test_ram_rtio_write_with_transaction)
258281
zassert_ok(rtio_submit(&i2c_rtio, 2), "submit should succeed");
259282

260283
wr_cqe = rtio_cqe_consume(&i2c_rtio);
284+
check_completion(wr_cqe, "i2c write should succeed");
261285
rd_cqe = rtio_cqe_consume(&i2c_rtio);
262-
zassert_ok(wr_cqe->result, "i2c write should succeed");
263-
zassert_ok(rd_cqe->result, "i2c read should succeed");
264-
rtio_cqe_release(&i2c_rtio, wr_cqe);
265-
rtio_cqe_release(&i2c_rtio, rd_cqe);
286+
check_completion(rd_cqe, "i2c read should succeed");
266287

267288
zassert_equal(memcmp(&reg_data[0], &rx_data[0], ARRAY_SIZE(reg_data)), 0,
268289
"Written and Read data should match");
@@ -296,8 +317,7 @@ void ram_rtio_isr(struct k_timer *tid)
296317
wr_cqe = rtio_cqe_consume(&i2c_rtio);
297318
if (wr_cqe) {
298319
TC_PRINT("timer checking write result, submitting read\n");
299-
zassert_ok(wr_cqe->result, "i2c write should succeed");
300-
rtio_cqe_release(&i2c_rtio, wr_cqe);
320+
check_completion(wr_cqe, "i2c write should succeed");
301321

302322
/* Write the address and read the data back */
303323
msgs[0].len = ARRAY_SIZE(rx_cmd);
@@ -322,17 +342,15 @@ void ram_rtio_isr(struct k_timer *tid)
322342
wr_cqe = rtio_cqe_consume(&i2c_rtio);
323343
if (wr_cqe) {
324344
TC_PRINT("read command complete\n");
325-
zassert_ok(wr_cqe->result, "i2c read command should succeed");
326-
rtio_cqe_release(&i2c_rtio, wr_cqe);
345+
check_completion(wr_cqe, "i2c read command should succeed");
327346
isr_state += 1;
328347
}
329348
break;
330349
case READ_DATA_WAIT:
331350
rd_cqe = rtio_cqe_consume(&i2c_rtio);
332351
if (rd_cqe) {
333352
TC_PRINT("read data complete\n");
334-
zassert_ok(rd_cqe->result, "i2c read data should succeed");
335-
rtio_cqe_release(&i2c_rtio, rd_cqe);
353+
check_completion(rd_cqe, "i2c read data should succeed");
336354
isr_state += 1;
337355
k_sem_give(&ram_rtio_isr_sem);
338356
k_timer_stop(tid);

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