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Titan-RealtekTitan-Realtek
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drivers: counter: rts5912: add support timer32 counter driver
Port rts5912 timer32 counter driver on Zephyr Signed-off-by: Titan Chen <[email protected]>
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‎drivers/counter/CMakeLists.txt

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@@ -54,3 +54,4 @@ zephyr_library_sources_ifdef(CONFIG_COUNTER_RTC_MAX32 counter_max32_rt
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zephyr_library_sources_ifdef(CONFIG_COUNTER_NXP_MRT counter_nxp_mrt.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_RA_AGT counter_renesas_ra_agt.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_RENESAS_RZ_GTM counter_renesas_rz_gtm.c)
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zephyr_library_sources_ifdef(CONFIG_COUNTER_REALTEK_RTS5912 counter_realtek_rts5912.c)

‎drivers/counter/Kconfig

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@@ -106,4 +106,6 @@ source "drivers/counter/Kconfig.renesas_ra"
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source "drivers/counter/Kconfig.renesas_rz"
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source "drivers/counter/Kconfig.rts5912"
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endif # COUNTER

‎drivers/counter/Kconfig.rts5912

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@@ -0,0 +1,12 @@
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# Realtek counter configuration options
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# Copyright (c) 2025 Realtek Corporation
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# SPDX-License-Identifier: Apache-2.0
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config COUNTER_REALTEK_RTS5912
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bool "Realtek rts5912 series counter driver"
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default y
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depends on DT_HAS_REALTEK_RTS5912_TIMER_ENABLED
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help
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Enable counter driver for Realtek RTS5912 MCU series. Such driver
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will expose the basic timer devices present on the MCU.

‎drivers/counter/counter_realtek_rts5912.c

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/*
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* Copyright (c) 2025 Realtek Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT realtek_rts5912_timer
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/**
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* @file
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* @brief Realtek RTS5912 Counter driver
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*
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* This is the driver for the 32-bit counters on the Realtek SoCs.
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*
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* Notes:
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* - The counters are running in down counting mode.
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* - Interrupts are triggered (if enabled) when the counter
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* reaches zero.
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* - These are not free running counters where there are separate
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* compare values for interrupts. When setting single shot alarms,
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* the counter values are changed so that interrupts are triggered
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* when the counters reach zero.
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/counter.h>
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#include <soc.h>
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#include <errno.h>
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#include <stdbool.h>
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#include "reg/reg_timer.h"
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#include "reg/reg_system.h"
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/clock_control_rts5912.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(counter_realtek_rts5912, CONFIG_COUNTER_LOG_LEVEL);
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struct counter_rts5912_config {
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struct counter_config_info info;
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void (*config_func)(void);
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struct TIMER32_Type *base_address;
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uint16_t prescaler;
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uint32_t clk_grp;
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uint32_t clk_idx;
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const struct device *clk_dev;
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};
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struct counter_rts5912_data {
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counter_alarm_callback_t alarm_cb;
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counter_top_callback_t top_cb;
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void *user_data;
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};
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#define COUNTER_RTS5912_REG_BASE(_dev) \
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((const struct counter_rts5912_config *const)_dev->config)->base_address
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static int counter_rts5912_start(const struct device *dev)
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{
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struct TIMER32_Type *counter = COUNTER_RTS5912_REG_BASE(dev);
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if (counter->CTRL & TIMER32_CTRL_EN) {
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return 0;
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}
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counter->CTRL |= (TIMER32_CTRL_EN);
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LOG_DBG("%p Counter started", dev);
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return 0;
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}
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static int counter_rts5912_stop(const struct device *dev)
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{
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struct TIMER32_Type *counter = COUNTER_RTS5912_REG_BASE(dev);
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if (!(counter->CTRL & TIMER32_CTRL_EN)) {
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/* Already stopped, nothing to do */
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return 0;
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}
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/* disable timer and disable interrupt. */
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counter->CTRL = TIMER32_CTRL_INTEN_DIS;
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counter->LDCNT = counter->CNT;
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/* w1c interrupt pending status */
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counter->INTCLR |= TIMER32_INTCLR_INTCLR;
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LOG_DBG("%p Counter stopped", dev);
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return 0;
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}
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static int counter_rts5912_get_value(const struct device *dev, uint32_t *ticks)
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{
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struct TIMER32_Type *counter = COUNTER_RTS5912_REG_BASE(dev);
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*ticks = counter->CNT + 1;
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return 0;
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}
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static int counter_rts5912_set_alarm(const struct device *dev, uint8_t chan_id,
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const struct counter_alarm_cfg *alarm_cfg)
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{
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struct counter_rts5912_data *data = dev->data;
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const struct counter_rts5912_config *counter_cfg = dev->config;
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struct TIMER32_Type *counter = counter_cfg->base_address;
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if (chan_id != 0) {
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LOG_ERR("Invalid channel id %u", chan_id);
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return -ENOTSUP;
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}
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/* Interrupts are only triggered when the counter reaches 0.
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* So only relative alarms are supported.
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*/
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if (alarm_cfg->flags & COUNTER_ALARM_CFG_ABSOLUTE) {
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return -ENOTSUP;
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}
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if (data->alarm_cb != NULL) {
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return -EBUSY;
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}
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if (!alarm_cfg->callback) {
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return -EINVAL;
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}
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if (alarm_cfg->ticks > counter_cfg->info.max_top_value) {
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return -EINVAL;
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}
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/* disable timer */
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counter->CTRL &= ~TIMER32_CTRL_EN;
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/* disable interrupt */
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counter->CTRL |= TIMER32_CTRL_INTEN_DIS;
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/* set in one-shot mode */
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counter->CTRL &= ~TIMER32_CTRL_MDSELS_PERIOD;
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/* set load counter */
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counter->LDCNT = alarm_cfg->ticks;
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data->alarm_cb = alarm_cfg->callback;
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data->user_data = alarm_cfg->user_data;
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/* w1c interrupt status */
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counter->INTCLR |= TIMER32_INTCLR_INTCLR;
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/* enable interrupt */
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counter->CTRL &= ~TIMER32_CTRL_INTEN_DIS;
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LOG_DBG("%p Counter alarm set to %u ticks", dev, alarm_cfg->ticks);
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/* enable timer and re-load PRCNT to CNT */
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counter->CTRL |= TIMER32_CTRL_EN;
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return 0;
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}
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static int counter_rts5912_cancel_alarm(const struct device *dev, uint8_t chan_id)
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{
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struct TIMER32_Type *counter = COUNTER_RTS5912_REG_BASE(dev);
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struct counter_rts5912_data *data = dev->data;
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if (chan_id != 0) {
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LOG_ERR("Invalid channel id %u", chan_id);
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return -ENOTSUP;
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}
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counter->CTRL = 0;
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data->alarm_cb = NULL;
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data->user_data = NULL;
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LOG_DBG("%p Counter alarm canceled", dev);
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return 0;
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}
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static uint32_t counter_rts5912_get_pending_int(const struct device *dev)
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{
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struct TIMER32_Type *counter = COUNTER_RTS5912_REG_BASE(dev);
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return counter->INTSTS;
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}
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static uint32_t counter_rts5912_get_top_value(const struct device *dev)
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{
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struct TIMER32_Type *counter = COUNTER_RTS5912_REG_BASE(dev);
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return counter->LDCNT;
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}
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static int counter_rts5912_set_top_value(const struct device *dev,
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const struct counter_top_cfg *cfg)
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{
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const struct counter_rts5912_config *counter_cfg = dev->config;
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struct counter_rts5912_data *data = dev->data;
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struct TIMER32_Type *counter = counter_cfg->base_address;
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int ret = 0;
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if (data->alarm_cb) {
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return -EBUSY;
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}
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if (cfg->ticks > counter_cfg->info.max_top_value) {
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return -EINVAL;
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}
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counter->CTRL &= ~TIMER32_CTRL_EN;
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counter->CTRL |= TIMER32_CTRL_INTEN_DIS;
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counter->LDCNT = cfg->ticks;
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data->top_cb = cfg->callback;
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data->user_data = cfg->user_data;
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if (data->top_cb) {
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/* w1c interrupt status */
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counter->INTCLR |= TIMER32_INTCLR_INTCLR;
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/* enable interrupt */
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counter->CTRL &= ~TIMER32_CTRL_INTEN_DIS;
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/* enable periodic alarm mode */
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counter->CTRL |= TIMER32_CTRL_MDSELS_PERIOD;
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} else {
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counter->CTRL = TIMER32_CTRL_INTEN_DIS;
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}
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LOG_DBG("%p Counter top value was set to %u", dev, cfg->ticks);
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counter->CTRL |= TIMER32_CTRL_EN;
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return ret;
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}
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static void counter_rts5912_isr(const struct device *dev)
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{
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struct TIMER32_Type *counter = COUNTER_RTS5912_REG_BASE(dev);
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struct counter_rts5912_data *data = dev->data;
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counter_alarm_callback_t alarm_cb;
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void *user_data;
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/* disable timer */
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counter->CTRL &= ~TIMER32_CTRL_EN;
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/* disable interrupt */
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counter->CTRL |= TIMER32_CTRL_INTEN_DIS;
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/* clear interrupt pending status */
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counter->INTCLR |= TIMER32_INTCLR_INTCLR;
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LOG_DBG("%p Counter ISR", dev);
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if (data->alarm_cb) {
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/* Alarm is one-shot, so disable callback */
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alarm_cb = data->alarm_cb;
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data->alarm_cb = NULL;
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user_data = data->user_data;
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alarm_cb(dev, 0, counter->CNT + 1, user_data);
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} else if (data->top_cb) {
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data->top_cb(dev, data->user_data);
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/* periodic alarm mode, enable interrupt */
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counter->CTRL &= ~TIMER32_CTRL_INTEN_DIS;
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/* enable timer again */
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counter->CTRL |= TIMER32_CTRL_EN;
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}
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}
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static uint32_t counter_rts5912_get_freq(const struct device *dev)
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{
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const struct counter_rts5912_config *counter_cfg = dev->config;
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return counter_cfg->info.freq;
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}
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static DEVICE_API(counter, counter_rts5912_api) = {
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.start = counter_rts5912_start,
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.stop = counter_rts5912_stop,
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.get_value = counter_rts5912_get_value,
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.set_alarm = counter_rts5912_set_alarm,
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.cancel_alarm = counter_rts5912_cancel_alarm,
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.set_top_value = counter_rts5912_set_top_value,
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.get_pending_int = counter_rts5912_get_pending_int,
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.get_top_value = counter_rts5912_get_top_value,
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.get_freq = counter_rts5912_get_freq,
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};
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static int counter_rts5912_init(const struct device *dev)
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{
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const struct counter_rts5912_config *counter_cfg = dev->config;
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struct TIMER32_Type *counter = counter_cfg->base_address;
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int rc;
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struct rts5912_sccon_subsys sccon_subsys = {
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.clk_grp = counter_cfg->clk_grp,
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.clk_idx = counter_cfg->clk_idx,
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};
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if (!device_is_ready(counter_cfg->clk_dev)) {
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LOG_ERR("device is not ready");
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return -ENODEV;
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}
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rc = clock_control_on(counter_cfg->clk_dev, (clock_control_subsys_t)&sccon_subsys);
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if (rc != 0) {
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LOG_ERR("clock power on fail");
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return rc;
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}
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counter_rts5912_stop(dev);
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/* Set preload and actually pre-load the counter */
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counter->LDCNT = counter_cfg->info.max_top_value;
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counter->CNT = counter_cfg->info.max_top_value;
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counter_cfg->config_func();
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LOG_DBG("Init complete!");
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return 0;
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}
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#define DEV_CONFIG_CLK_DEV_INIT(n) \
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.clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
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.clk_grp = DT_INST_CLOCKS_CELL_BY_NAME(n, tmr32, clk_grp), \
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.clk_idx = DT_INST_CLOCKS_CELL_BY_NAME(n, tmr32, clk_idx),
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#define COUNTER_RTS5912_INIT(inst) \
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static void counter_rts5912_irq_config_##inst(void); \
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\
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static struct counter_rts5912_data counter_rts5912_dev_data_##inst; \
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\
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static struct counter_rts5912_config counter_rts5912_dev_config_##inst = { \
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.info = \
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{ \
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.max_top_value = DT_INST_PROP(inst, max_value), \
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.freq = DT_INST_PROP(inst, clock_frequency) / \
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(1 << DT_INST_PROP(inst, prescaler)), \
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.flags = 0, \
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.channels = 1, \
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}, \
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\
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.config_func = counter_rts5912_irq_config_##inst, \
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.base_address = (struct TIMER32_Type *)DT_INST_REG_ADDR(inst), \
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.prescaler = DT_INST_PROP(inst, prescaler), \
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DEV_CONFIG_CLK_DEV_INIT(inst)}; \
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\
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DEVICE_DT_INST_DEFINE(inst, counter_rts5912_init, NULL, &counter_rts5912_dev_data_##inst, \
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&counter_rts5912_dev_config_##inst, PRE_KERNEL_1, \
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CONFIG_COUNTER_INIT_PRIORITY, &counter_rts5912_api); \
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\
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static void counter_rts5912_irq_config_##inst(void) \
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{ \
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IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority), counter_rts5912_isr, \
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DEVICE_DT_INST_GET(inst), 0); \
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irq_enable(DT_INST_IRQN(inst)); \
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}
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DT_INST_FOREACH_STATUS_OKAY(COUNTER_RTS5912_INIT)

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