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Andy Ross
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drivers/timer: New xtensa timer with tickless support
Rewritten Xtensa CCOUNT driver along the lines of all the other new drivers. The new API permits much smaller code. Notably: The Xtensa counter is a 32 bit up-counter with a comparator register. It's in some sense the archetype of this kind of timer as it's the simplest of the bunch (everything else has quirks: NRF is very slow and 24 bit, HPET has a runtime frequency detection, RISC-V is 64 bit...). I should have written this one first. Note also that this includes a blacklist of the xtensa architecture on the tests/driver/ipm test. I'm getting spurious failures there where a k_sem_take() call with a non-zero timeout is being made out of the console output code in interrupt context. This seems to have nothing to do with the timer; I suspect it's because the old timer drivers would (incorrectly!) call z_clock_announce() in non-interrupt context in some contexts (e.g. "expiring really soon"). Apparently this test (or something in the IPM or Xtensa console code) was somehow relying on that on Xtensa. But IPM is a Quark thing and there's no particular reason to run this test there. Signed-off-by: Andy Ross <[email protected]>
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drivers/timer/Kconfig

Lines changed: 14 additions & 34 deletions
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@@ -186,43 +186,23 @@ config XTENSA_TIMER
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bool "Xtensa timer support"
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depends on XTENSA
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default y
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select TICKLESS_CAPABLE
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help
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This module implements a kernel device driver for the Xtensa processor and
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provides the standard "system clock driver" interfaces.
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If unchecked, no timer will be used.
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If checked it will use either an internal timer (default option) or an
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external timer. In that case one shall unselect XTENSA_INTERNAL_TIMER and
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define XTENSA_TIMER_IRQ and XTENSA_TIMER_IRQ_PRIORITY.
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config XTENSA_INTERNAL_TIMER
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bool "Xtensa internal timer"
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depends on XTENSA_TIMER
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default y
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help
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This module implements a kernel device driver for the Xtensa processor
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internal timer and provides the standard "system clock driver" interfaces.
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If unchecked, an external timer will be used. It will rely on a tick
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interrupt connected to an IRQ line. In this case one shall define
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both XTENSA_TIMER_IRQ and XTENSA_TIMER_IRQ_PRIORITY.
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config XTENSA_TIMER_IRQ
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int "Xtensa external timer interrupt number"
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depends on XTENSA_TIMER && !XTENSA_INTERNAL_TIMER
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range -1 31
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default -1
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help
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This is the number of interrupt line used by the external timer.
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The special value of -1 allows using the internal timer in order to
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emulate an external timer. This is generally useful for running the project on
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a simulator where it is hard to emulate an external interrupt.
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config XTENSA_TIMER_IRQ_PRIORITY
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int "Xtensa external timer interrupt priority"
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depends on XTENSA_TIMER && !XTENSA_INTERNAL_TIMER
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range 1 6
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Enables a system timer driver for Xtensa based on the CCOUNT
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and CCOMPARE special registers.
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config XTENSA_TIMER_ID
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int "System timer CCOMPAREn register index"
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default 1
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depends on XTENSA_TIMER
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help
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This is the priority of interrupt line.
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Index of the CCOMPARE register (and associated interrupt)
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used for the system timer. Xtensa CPUs have hard-configured
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interrupt priorities associated with each timer, and some of
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them can be unmaskable (and thus not usable by OS code that
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need synchronization, like the timer subsystem!). Choose
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carefully. Generally you want the timer with the highest
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priority maskable interrupt.
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config SYSTEM_CLOCK_DISABLE
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bool "API to disable system clock"

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