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Titan-RealtekTitan-Realtek
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drivers: pwm: rts5912: port pwm driver on Zephyr
Add PWM driver support for Realtek RTS5912 Signed-off-by: Titan Chen <[email protected]>
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‎drivers/pwm/CMakeLists.txt

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@@ -53,3 +53,4 @@ zephyr_library_sources_ifdef(CONFIG_PWM_RENESAS_RZ_GPT pwm_renesas_rz_gpt.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE pwm_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_CAPTURE pwm_capture.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_SHELL pwm_shell.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_REALTEK_RTS5912 pwm_realtek_rts5912.c)

‎drivers/pwm/Kconfig

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@@ -120,4 +120,6 @@ source "drivers/pwm/Kconfig.fake"
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source "drivers/pwm/Kconfig.renesas_rz"
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source "drivers/pwm/Kconfig.rts5912"
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endif # PWM

‎drivers/pwm/Kconfig.rts5912

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# Copyright (c) 2025, Realtek, SIBG-SD7
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# SPDX-License-Identifier: Apache-2.0
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config PWM_REALTEK_RTS5912
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bool "Realtek RTS5912 PWM Driver"
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default y
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depends on DT_HAS_REALTEK_RTS5912_PWM_ENABLED
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help
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Enable PWM driver for Realtek RTS5912 EC.

‎drivers/pwm/pwm_realtek_rts5912.c

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/*
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* Copyright (c) 2025 Realtek, SIBG-SD7
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT realtek_rts5912_pwm
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#include <soc.h>
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#include <errno.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/pwm.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/logging/log.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/clock_control/clock_control_rts5912.h>
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#include "reg/reg_pwm.h"
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LOG_MODULE_REGISTER(pwm, CONFIG_PWM_LOG_LEVEL);
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#define PWM_CYCLE_PER_SEC MHZ(50)
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struct pwm_rts5912_config {
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uint32_t pwm_base;
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uint32_t pwm_clk_grp;
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uint32_t pwm_clk_idx;
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const struct device *clk_dev;
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const struct pinctrl_dev_config *pcfg;
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};
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static int pwm_rts5912_set_cycles(const struct device *dev, uint32_t channel,
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uint32_t period_cycles, uint32_t pulse_cycles, pwm_flags_t flags)
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{
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const struct pwm_rts5912_config *const pwm_config = dev->config;
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PWM_Type *pwm_reg = (PWM_Type *)pwm_config->pwm_base;
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uint32_t pwm_div, pwm_duty;
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if (channel > 0) {
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return -EIO;
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}
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pwm_div = period_cycles;
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pwm_duty = pulse_cycles;
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pwm_reg->DIV = pwm_div;
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pwm_reg->DUTY = pwm_duty;
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LOG_DBG("period_cycles=%d, pulse_cycles=%d, pwm_div=%d, pwm_duty=%d", period_cycles,
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pulse_cycles, pwm_div, pwm_duty);
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if (flags == PWM_POLARITY_INVERTED) {
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pwm_reg->CTRL |= PWM_CTRL_INVT_Msk;
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}
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pwm_reg->CTRL |= PWM_CTRL_EN_Msk;
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return 0;
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}
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static int pwm_rts5912_get_cycles_per_sec(const struct device *dev, uint32_t channel,
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uint64_t *cycles)
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{
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ARG_UNUSED(dev);
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if (channel > 0) {
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return -EIO;
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}
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if (cycles) {
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*cycles = PWM_CYCLE_PER_SEC;
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}
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return 0;
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}
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static DEVICE_API(pwm, pwm_rts5912_driver_api) = {
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.set_cycles = pwm_rts5912_set_cycles,
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.get_cycles_per_sec = pwm_rts5912_get_cycles_per_sec,
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};
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static int pwm_rts5912_init(const struct device *dev)
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{
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const struct pwm_rts5912_config *const pwm_config = dev->config;
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struct rts5912_sccon_subsys sccon;
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int rc = 0;
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#if defined(CONFIG_PINCTRL)
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rc = pinctrl_apply_state(pwm_config->pcfg, PINCTRL_STATE_DEFAULT);
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if (rc < 0) {
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LOG_ERR("PWM pinctrl setup failed (%d)", rc);
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return rc;
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}
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#endif
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#if defined(CONFIG_CLOCK_CONTROL)
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if (!device_is_ready(pwm_config->clk_dev)) {
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return -ENODEV;
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}
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sccon.clk_grp = pwm_config->pwm_clk_grp;
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sccon.clk_idx = pwm_config->pwm_clk_idx;
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rc = clock_control_on(pwm_config->clk_dev, (clock_control_subsys_t)&sccon);
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if (rc != 0) {
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return rc;
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}
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#endif
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return rc;
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}
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#define RTS5912_PWM_PINCTRL_DEF(inst) PINCTRL_DT_INST_DEFINE(inst)
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#define RTS5912_PWM_CONFIG(inst) \
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static struct pwm_rts5912_config pwm_rts5912_config_##inst = { \
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.pwm_base = DT_INST_REG_ADDR(inst), \
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.pwm_clk_grp = DT_INST_CLOCKS_CELL_BY_NAME(inst, pwm, clk_grp), \
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.pwm_clk_idx = DT_INST_CLOCKS_CELL_BY_NAME(inst, pwm, clk_idx), \
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.clk_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(inst)), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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};
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#define RTS5912_PWM_DEVICE_INIT(index) \
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RTS5912_PWM_PINCTRL_DEF(index); \
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RTS5912_PWM_CONFIG(index); \
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DEVICE_DT_INST_DEFINE(index, &pwm_rts5912_init, NULL, NULL, &pwm_rts5912_config_##index, \
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POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&pwm_rts5912_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(RTS5912_PWM_DEVICE_INIT)

‎dts/arm/realtek/ec/rts5912.dtsi

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@@ -8,6 +8,7 @@
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#include <arm/armv8-m.dtsi>
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#include <zephyr/dt-bindings/clock/rts5912_clock.h>
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#include <zephyr/dt-bindings/gpio/realtek-gpio.h>
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#include <zephyr/dt-bindings/pwm/pwm.h>
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/ {
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cpus {
@@ -233,6 +234,78 @@
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140 0 141 0 142 0 143 0>;
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};
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};
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pwm0: pwm@4000f000 {
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compatible = "realtek,rts5912-pwm";
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clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM0_CLKPWR>;
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clock-names = "pwm";
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reg = <0x4000f000 0x0c>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pwm1: pwm@4000f00c {
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compatible = "realtek,rts5912-pwm";
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clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM1_CLKPWR>;
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clock-names = "pwm";
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reg = <0x4000f00c 0x0c>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pwm2: pwm@4000f018 {
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compatible = "realtek,rts5912-pwm";
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clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM2_CLKPWR>;
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clock-names = "pwm";
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reg = <0x4000f018 0x0c>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pwm3: pwm@4000f024 {
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compatible = "realtek,rts5912-pwm";
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clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM3_CLKPWR>;
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clock-names = "pwm";
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reg = <0x4000f024 0x0c>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pwm4: pwm@4000f030 {
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compatible = "realtek,rts5912-pwm";
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clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM4_CLKPWR>;
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clock-names = "pwm";
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reg = <0x4000f030 0x0c>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pwm5: pwm@4000f03c {
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compatible = "realtek,rts5912-pwm";
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clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM5_CLKPWR>;
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clock-names = "pwm";
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reg = <0x4000f03c 0x0c>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pwm6: pwm@4000f048 {
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compatible = "realtek,rts5912-pwm";
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clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM6_CLKPWR>;
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clock-names = "pwm";
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reg = <0x4000f048 0x0c>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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pwm7: pwm@4000f054 {
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compatible = "realtek,rts5912-pwm";
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clocks = <&sccon RTS5912_SCCON_PERIPH_GRP0 PERIPH_GRP0_PWM7_CLKPWR>;
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clock-names = "pwm";
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reg = <0x4000f054 0x0c>;
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status = "disabled";
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#pwm-cells = <3>;
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};
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};
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swj_port: swj-port {

‎dts/bindings/pwm/realtek,rts5912-pwm.yaml

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# Copyright (c) 2025, Realtek, SIBG-SD7
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# SPDX-License-Identifier: Apache-2.0
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description: Realtek RTS5912 PWM
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include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
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compatible: "realtek,rts5912-pwm"
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properties:
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reg:
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required: true
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"#pwm-cells":
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const: 3
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pwm-cells:
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- channel
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- period
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- flags

‎soc/realtek/ec/rts5912/reg/reg_pwm.h

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/*
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* Copyright (c) 2025 Realtek, SIBG-SD7
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_REALTEK_RTS5912_REG_PWM_H
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#define ZEPHYR_SOC_REALTEK_RTS5912_REG_PWM_H
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/*
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* @brief PWM Controller (PWM)
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*/
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typedef struct {
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volatile uint32_t DUTY;
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volatile uint32_t DIV;
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union {
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volatile uint32_t CTRL;
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struct {
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uint32_t: 28;
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volatile uint32_t CLKSRC: 1;
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volatile uint32_t INVT: 1;
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volatile uint32_t RST: 1;
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volatile uint32_t EN: 1;
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} CTRL_b;
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};
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} PWM_Type;
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/* CTRL */
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#define PWM_CTRL_CLKSRC_Pos (28UL)
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#define PWM_CTRL_CLKSRC_Msk BIT(28)
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#define PWM_CTRL_INVT_Pos (29UL)
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#define PWM_CTRL_INVT_Msk BIT(29)
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#define PWM_CTRL_RST_Pos (30UL)
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#define PWM_CTRL_RST_Msk BIT(30)
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#define PWM_CTRL_EN_Pos (31UL)
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#define PWM_CTRL_EN_Msk BIT(31)
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#endif /* ZEPHYR_SOC_REALTEK_RTS5912_REG_PWM_H */

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