Trying to get fs_sample to work with NUCLEO-H503RB

[seasea128]

Hi,

I'm trying to use SD card with file system with my project, so I looked at fs_sample project to see how to use SD card over SPI. I copied over the overlay from NUCLEO-F429ZI and set the SPI up for H503RB.

This is what I have in nucleo_h503rb.overlay.

&spi1 {
	status = "okay";

	cs-gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
	pinctrl-0 = <&spi1_miso_pa0 &spi1_mosi_pa7 &spi1_sck_pa2>;
	pinctrl-names = "default";
	sdhc0: sdhc@0 {
		compatible = "zephyr,sdhc-spi-slot";
		reg = <0>;
		status = "okay";
		mmc {
			compatible = "zephyr,sdmmc-disk";
			disk-name = "SD";
			status = "okay";
		};
		spi-max-frequency = <25000000>;
		spi-clock-mode-cpol;
		spi-clock-mode-cpha;
	};
};

After writing the overlay, it compiles fine. However, when running the sample on the board, the error below is shown.

[00:00:00.001,000] <err> spi_ll_stm32: Unsupported frequency 400000Hz, max 120000000Hz, min 937500Hz
[00:00:00.001,000] <err> os: ***** BUS FAULT *****
[00:00:00.001,000] <err> os:   Precise data bus error
[00:00:00.001,000] <err> os:   BFAR Address: 0x4
[00:00:00.001,000] <err> os: r0/a1:  0x00ff9268  r1/a2:  0x0004155c  r2/a3:  0x00000000
[00:00:00.001,000] <err> os: r3/a4:  0x00000000 r12/ip:  0x00005dc0 r14/lr:  0x08005229
[00:00:00.001,000] <err> os:  xpsr:  0x09000000
[00:00:00.001,000] <err> os: Faulting instruction address (r15/pc): 0x08004b76
[00:00:00.001,000] <err> os: >>> ZEPHYR FATAL ERROR 25: Unknown error on CPU 0
[00:00:00.001,000] <err> os: Current thread: 0x20000838 (unknown)
[00:00:00.072,000] <err> os: Halting system

So I tried changing APB1 and APB2 prescaler as mentioned in issue #63308 and the minimum frequency is still the same.

&rcc {
	apb1-prescaler = <16>;
	apb2-prescaler = <16>;
};

I think it might be because the clock inputs to SPI on STM32H503RB are pll1_q_clk, pll2_p_clk, and per_clk according to docs.

If that's the case, is there anyway to reduce PLL clock? Or is there's other way to reduce minimum SPI clock?

[FRASTM]

By default, the SPI1 clock is the STM32_SRC_PLL1_Q : <&rcc STM32_SRC_PLL1_Q SPI1_SEL(0)>;
Did you try to reduce the PLL1_Q freq with a higher value than <2>:

&pll {
	div-m = <2>;
	mul-n = <40>;
	div-p = <2>;
	div-q = <24>; --> gives 20MHz 

If you select another source clock for the SPI1, PLL2_P for example, the PLL2 must be configured and enabled (in the nucleo_h533re dts or overlay)

[FRASTM]

WIth the nucleo_h533 I have,
I observe the same error on the samples/subsys/fs/fs_sample/ test
<err> spi_ll_stm32: Unsupported frequency 400000Hz, max 120000000Hz, min 937500Hz

• and gives the following output with div-q = <16>; or div-q = <24>;

*** Booting Zephyr OS build v4.0.0-1802-g5d2068f4919a ***
[00:00:00.020,000] <inf> sd: Card does not support CMD8, assuming legacy card
[00:00:00.021,000] <err> main: Storage init ERROR!
[00:00:00.041,000] <inf> sd: Card does not support CMD8, assuming legacy card
[00:00:00.043,000] <err> fs: fs mount error (-5)
Error mounting disk.
[00:00:00.043,000] <err> fs: fs not mounted (mp == 0x20000000)

Could you that try on your side ?