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sylvioalves opened this issue Oct 21, 2020 · 175 comments
Open

ESP32 development overview #29394

sylvioalves opened this issue Oct 21, 2020 · 175 comments
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Meta A collection of features, enhancements or bugs platform: ESP32 Espressif ESP32 RFC Request For Comments: want input from the community

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@sylvioalves
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sylvioalves commented Oct 21, 2020

ESP32 Development Status

PERIPHERAL ESP32 ESP32-S2 ESP32-C3 ESP32-S3 ESP32-C6 ESP32-C2
CPU ✔️ ✔️ ✔️ ✔️ ✔️ ✔️
IRQ ✔️ ✔️ ✔️ ✔️ ✔️ ✔️
TIMERS ✔️ ✔️ ✔️ ✔️ ✔️
UART ✔️ ✔️ ✔️ ✔️ ✔️ ✔️
I2C ✔️ ✔️ ✔️ ✔️ ✔️
SPI FLASH ✔️ ✔️ ✔️ ✔️ ✔️
SPI FLASH (Octal) N/A N/A N/A ✔️ N/A N/A
SPI RAM ✔️ ✔️ N/A ✔️ N/A ✔️
SPI RAM (Octal) N/A N/A N/A ✔️ N/A N/A
SPI ✔️ ✔️ ✔️ ✔️ ✔️
Cryptography
Wi-Fi ✔️ ✔️ ✔️ ✔️ ✔️
BLUETOOTH ✔️ N/A ✔️ ✔️
IEEE802.15.4 N/A N/A N/A N/A N/A
BT Mesh
GPIO ✔️ ✔️ ✔️ ✔️ ✔️ ✔️
TWAI ✔️ ✔️ ✔️ ✔️
E-FUSE ✔️ ✔️ ✔️ ✔️
ADC ✔️ ✔️ ✔️ ✔️
ADC DMA ✔️ ✔️
DAC ✔️ ✔️ N/A N/A N/A N/A
DAC DMA N/A N/A N/A N/A
MCPWM ✔️ N/A N/A ✔️ N/A
LEDPWM ✔️ ✔️ ✔️ ✔️ ✔️
PCNT ✔️ ✔️ N/A ✔️ N/A
TRNG ✔️ ✔️ ✔️ ✔️
LCD N/A N/A N/A N/A N/A
DMA SPI ✔️ ✔️ ✔️ ✔️ ✔️
WATCHDOG ✔️ ✔️ ✔️ ✔️ ✔️
LOW POWER
Light sleep/Deep sleep
RTC
USB OTG N/A N/A
USB CDC N/A N/A ✔️ ✔️ ✔️
ETH MAC ✔️ N/A N/A N/A N/A N/A
SDHC ✔️ N/A N/A ✔️ N/A
SDIO
slave
CAMERA N/A N/A N/A ✔️ N/A N/A
I2S ✔️ ✔️ ✔️ ✔️
ULP N/A N/A
SMP N/A N/A N/A N/A
AMP N/A N/A N/A N/A
FLASH ENCRYPTION ✔️ ✔️ ✔️ ✔️ ✔️
DFS
OPENOCD ✔️ ✔️ ✔️ ✔️ ✔️
MCUBOOT
(Zephyr port - bootloader only)
✔️ ✔️ ✔️ ✔️ ✔️
MCUBOOT
(Espressif port, secure boot V2)
✔️ ✔️ ✔️ ✔️ ✔️

Last update: 09/Apr/2025

  • ✔️ Feature is supported.
  • ➕ Work in progress.
  • ❌ Feature is not supported
  • N/A: Not applicable to this device.

Introduction

This RFC gives an overview of features and enhancements we plan to contribute for Espressif's ESP32 SoC device. It is not intended to be a proper roadmap but it gives some information about our effort on having more support for Zephyr RTOS.

Problem description

Currently, ESP32 support consists of a few peripheral implementations as such as GPIO, UART and I2C, which limits device usage on Zephyr. There are missing peripheral drivers as such as WiFi and BLE that are very often requested by the community, but lack implementation.

Proposed change

The proposal is to enable the powerful features that ESP32 SoC can offer, starting by bringing up WiFi subsystem. Meanwhile, we shall also work on developing yet unsupported peripheral drivers.

Detailed RFC

Initial Development

As there have already been some work on the WiFi bring up, a few modifications can be listed below describing initial requirements:

  • Add ESP-IDF bootloader that handles SoC initialization (cache, MMU and partition tables). In long term, Zephyr's bootloader might be supported as well.
  • Set XIP support by default to support ESP-IDF bootloader.
  • Update linker script with proper flash, ram sections and symbols map.
  • Update clock settings and entropy drivers.
  • Add timer/counter support.
  • Add NVS support.
  • Add Wifi sources and network drivers.

WiFi Driver and Network Integration

We have already implemented the WiFi adapter driver, which binds ESP32 internal WiFi to Zephyr's ETHERNET_L2 layer. However, Zephyr has yet no support for WiFI SoC that runs as non-offloaded driver. It means that creating a network device following subsys/net/l2/wifi/wifi_mgmt.c API does not allow binding to the ETHERNET_L2. There is no such implementation for a WIFI_L2 layer, which would allow using WIFI_MGMT API to integrate with ETHERNET_L2 layer.

This will be addressed in another issue focused on network integration and user API.

ESP32 HAL Module

To keep the folder structure in sync with other vendors, and to update ESP-IDF source to version 4.2, repository modules/hal/esp-idf shall be updated to modules/hal/espressif. Only minimal and necessary ESP-IDF sources shall be included in this repository, which includes source files, adapter layers and symbols to handle internal calls.
It will require changing west.yml to point to this new branch.

Peripherals

The list below shows currently unsupported peripherals. We plan to start developing a few drivers in long term. Porting all the components is tricky due to FreeRTOS dependency in the current ESP-IDF implementation. SPI related code has special considerations due to dual-core SoC architecture and XIP (code execution from Flash). BLE and WiFi share the same RF radio, which implies handling their coexistence by hardware or software. ESP-IDF already takes care of everything but the porting is not straightforward. Also, we still have to analyze issues regarding multi-core support, SMP and power management.

  • SMP
  • ULP
  • CAN

Future Plans

Future Devices

It is well known that Espressif has other chipsets on its platforms. We plan to add support to them as well when a reasonable ESP32 support on Zephyr is achieved for product level usage. For the time being, there are plans to add support for (not in any chronological order):

  • ESP32-H2 (TBD)
  • ESP32-H4 (TBD)
  • ESP32-P4 (TBD)

More may be added to the list as Espressif adds more chipsets to its linecard.

@sylvioalves sylvioalves added the RFC Request For Comments: want input from the community label Oct 21, 2020
@ExtremeGTX
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I think after ESP32 WiFi Support a lot of basic stuff will be fixed, like WIFI, Flash Cache, 2nd Stage Bootloader support, Linker script updates.

Could you please tell us if there are any progress on the mentioned drivers ? (for cooperation and avoiding double efforts)

@ExtremeGTX ExtremeGTX added the platform: ESP32 Espressif ESP32 label Oct 25, 2020
@sylvioalves
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The items below are implemented. We are a few days of creating a PR for that:

Add ESP-IDF bootloader that handles SoC initialization (cache, MMU and partition tables). In long term, Zephyr's bootloader might be supported as well.
Set XIP support by default to support ESP-IDF bootloader.
Update linker script with proper flash, ram sections and symbols map.
Update clock settings and entropy drivers.
Add timer/counter support.
Add NVS support.
Add Wifi sources and network drivers.

We also expect to start working on SPI for the next days.

@chrta
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chrta commented Oct 26, 2020

Could you add some information when/if Secure Boot and Flash Encryption are planned?

@sylvioalves
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Could you add some information when/if Secure Boot and Flash Encryption are planned?

Sure. I can't tell you exactly when but It is on our development backlog. I'll update you once we get ourselves working on it.

@mrrosen
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mrrosen commented Nov 16, 2020

Note, I added support for ESP32-S2 in a PR a while back but since it required an unreleased version of the ESP-IDF (v4.2), I stalled work on that PR until Espressif officially released a stable version supporting ESP32-S2; If youre changing the way Zephyr includes the IDF, Id be happy to adapt my PR for it but I think waiting on a stable release of it would be best
(#27246)

@mahavirj
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@mrrosen

I added support for ESP32-S2 in a PR a while back

Thank you for update.

If youre changing the way Zephyr includes the IDF, Id be happy to adapt my PR for it but I think waiting on a stable release of it would be best

Yes we are trying to align with stable ESP-IDF v4.2 release timelines. Release candidate is due sometimes next week, followed up by formal announcement. Regarding how Zephyr consumes IDF, some discussions are on-going at zephyrproject-rtos/esp-idf#4, we will keep you posted on your PR for ESP32-S2 support based on our progress.

@mrrosen
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mrrosen commented Dec 9, 2020

@sylvioalves Since ESP-IDF v4.2 has been finally been released, what is the plan for updating the esp-idf/hal_espressif so I can align my ESP32-S2 PR to it?

@sylvioalves
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@mrrosen, we are waiting approval to use this hal_espressifbranch: https://github.com/sylvioalves/hal_espressif/tree/zephyr
It is based on release/v4.2 and will probably make easier for you to rebase.
I'll update you once we get on track.

@shlomow
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shlomow commented Dec 12, 2020

Hi! I saw some forks that contain some features for the esp32. Maybe it will be useful if anyone that works on features for the esp32 can post here his fork. It will remove any duplication of work and allow people to test and use some code which has not upstreamed yet. I intend to add support for spi and I hope that I am not duplicating this.

@sylvioalves
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Yes, we need to handle that in some way.
Regarding SPI, we have already implemented SPI2 and SPI3 drivers but it is under internal review. Same for timer drivers. Once we have a few PRs merged, we will push it as well.

@DRNadler
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DRNadler commented Jan 9, 2021

Great to hear of your progress on ESP32! In case you do not have enough to do, if I understand correctly S3 adds USB - perhaps USB support should go on the list? Thanks for your efforts!

@oldrev
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oldrev commented Jan 12, 2021

Thanks for your great effort.

Is there any chance to support the SmartConfig mechanism?

@K2AAE
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K2AAE commented Apr 23, 2021

It's been awhile, any updates? Just purchased a ESP32-S2

@tiborrr
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tiborrr commented May 25, 2021

@sylvioalves how is the progress going on security features like secure boot and flash encryption?

@sylvioalves
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@sylvioalves how is the progress going on security features like secure boot and flash encryption?

Hi @tiborrr, our current efforts are directed to support ESP32S2 and ESP32C3. For security, so far, we haven't advanced on such front. But I invite you to attend to our lightning talk about our plans on Zephyr Summit.

@tiborrr
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tiborrr commented May 26, 2021

@sylvioalves how is the progress going on security features like secure boot and flash encryption?

Hi @tiborrr, our current efforts are directed to support ESP32S2 and ESP32C3. For security, so far, we haven't advanced on such front. But I invite you to attend to our lightning talk about our plans on Zephyr Summit.

I already have registered so I will definitely join the talk. Thanks for the update!

@torntrousers
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@sylvioalves how is the progress going on security features like secure boot and flash encryption?

Hi @tiborrr, our current efforts are directed to support ESP32S2 and ESP32C3. For security, so far, we haven't advanced on such front. But I invite you to attend to our lightning talk about our plans on Zephyr Summit.

Is there a recording of that talk available somewhere?

@tiborrr
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tiborrr commented Jun 20, 2021

@torntrousers The recording is not yet online however the slides are. Perhaps you can find what you need in there.

https://drive.google.com/file/d/1AmP1R9Mr08nqR_wwNLsgOHaiKaLR9UlS/view?usp=sharing

@torntrousers
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torntrousers commented Jun 20, 2021

@torntrousers The recording is not yet online however the slides are. Perhaps you can find what you need in there.

https://drive.google.com/file/d/1AmP1R9Mr08nqR_wwNLsgOHaiKaLR9UlS/view?usp=sharing

Thanks!

I'm completly new to Zephyr and this morning have been trying to get it running on an ESP32 but really quite lost - none of the doc or guides I can find seem to work right away or be quite up to date. Is there something up to date somewhere that would tell me how to get helloworld or blinky running on an ESP32 (using a Windows environment, sorry)?

@tiborrr
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tiborrr commented Jun 20, 2021

@torntrousers i actually switched to Ubuntu because of your experience. Getting USB to work on WSL was a pain. Now that I've switched to Ubuntu developing has been a treat.

@sylvioalves
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@torntrousers Hi, after having your environment properly set, follow the guide below:
https://docs.zephyrproject.org/latest/boards/xtensa/esp32/doc/index.html

Let us know if you still face any issue.

@torntrousers
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torntrousers commented Jun 21, 2021

Thanks @sylvioalves , I have things compiling but can't get the standard samples working, eg: #36412 and #36414

@protobits
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WiFi Driver and Network Integration

We have already implemented the WiFi adapter driver, which binds ESP32 internal WiFi to Zephyr's ETHERNET_L2 layer. However, Zephyr has yet no support for WiFI SoC that runs as non-offloaded driver. It means that creating a network device following subsys/net/l2/wifi/wifi_mgmt.c API does not allow binding to the ETHERNET_L2. There is no such implementation for a WIFI_L2 layer, which would allow using WIFI_MGMT API to integrate with ETHERNET_L2 layer.

This will be addressed in another issue focused on network integration and user API.

Hi, any progress on this? I ask since I registereded callbacks for CARRIER_UP/DOWN events to get notified when WiFi is connected/disconnected but it is problematic since sometimes the connection attempt fails and the CARRIER_DOWN event is not generated, since it was never up in the first place (I do get the DOWN event after an UP event).
I need to handle these events myself because reconnection on connection loss (via CONFIG_ESP32_WIFI_STA_RECONNECT) is not aware of a manual disconnection and attempts to reconnect again. Also, I need the events to only start tasks (such as connecting to MQTT broker) when a connection is up (otherwise I need to brute force connect attempts).

@StefanHri
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When approximately ADC and BLE will be supported on ESP32C6?

@rftafas
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rftafas commented Jan 13, 2025

When approximately ADC and BLE will be supported on ESP32C6?
@StefanHri

It is on short term backlog (i.e. for Q1/Q2-25). I wouldn't hold my breath, though, we have been busy doing lots of bugfixes and things might be delayed.

If it is blocking you and given ADC is already supported by other devices, you can give it a try (and please, report back if you do so).

@mspeder
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mspeder commented Jan 17, 2025

Hi!

Is there an update for 15.4 RF for C6 (to be used as an underlying radio for zephyr oThread) ? Looking at devcon24 video it seemed that 15.4 radio was planned for Q4 but thread stack was on backlog...

Also what is the current status of I2C on C6 ? Fix #82941 seems merged but still appears as unsupported on the status table ?

Thanks a lot!

@sylvioalves
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Hi!

Is there an update for 15.4 RF for C6 (to be used as an underlying radio for zephyr oThread) ? Looking at devcon24 video it seemed that 15.4 radio was planned for Q4 but thread stack was on backlog...

Also what is the current status of I2C on C6 ? Fix #82941 seems merged but still appears as unsupported on the status table ?

Thanks a lot!

Please, check this WIP:
zephyrproject-rtos/hal_espressif#379

@mspeder
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mspeder commented Jan 17, 2025

Please, check this WIP:
zephyrproject-rtos/hal_espressif#379

@sylvioalves Thanks a lot for pointing this one ! Great to see there is active work on this. Hopefully it will land soon :-)

@roma-jam
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Hi @sylvioalves,

I want to make a contribution to this project, particulary regarding the USB OTG (as I am exactly from that team).

I would like to ask is there any suggestion (notes, lists of issues, so anything), from where to start?

Thanks.

@rftafas
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rftafas commented Jan 28, 2025

Hi @sylvioalves,

I want to make a contribution to this project, particulary regarding the USB OTG (as I am exactly from that team).

I would like to ask is there any suggestion (notes, lists of issues, so anything), from where to start?

Thanks.

Hi,

It starts with hal_espressif, it should contain all the LL layer. Also, I suggest ESP32-S3. The work will be to glue those LL calls to Zephyr API (oversimplified).

The hal_espressif is not a public API and lacks user-level documentation, but luckily, you can refer to ESP-IDF and other peripherals already supported in Zephyr. hal_espressif has some developer-level documentation, as it is an extract from ESP-IDF and we try to minimize changes to it because of that. The closest to ESP-IDF it is, the less difficult to update.

Related feature request: #46044

@andreaskurz
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Hey there :)

I might have discovered a bug/regression from zephyr 3.6 -> 3.7 with BT Mesh and wanted to know where I should report this. In the repo for hal_espressif the issue function is disabled.

It's about the samples/bluetooth/mesh which perfectly works with an esp32c3 in Zephyr 3.6 but with 3.7 the CPU logs an Intruction Access fault during provisioning. It looks somewhat like this:

*** Booting Zephyr OS build 4a1ffd851912 ***
Initializing...
[00:00:00.046,000] <inf> fs_nvs: 8 Sectors of 4096 bytes
[00:00:00.046,000] <inf> fs_nvs: alloc wra: 0, fc8
[00:00:00.046,000] <inf> fs_nvs: data wra: 0, 2c
[00:00:00.047,000] <inf> esp32_bt_adapter: BT controller compile version [f583012]
[00:00:00.113,000] <inf> bt_hci_core: No ID address. App must call settings_load()
Bluetooth initialized
[00:00:00.113,000] <wrn> bt_mesh_access: Unused space in relation list: 10
[00:00:00.336,000] <inf> bt_hci_core: Identity: 54:32:04:87:08:60 (public)
[00:00:00.336,000] <inf> bt_hci_core: HCI: version 5.0 (0x09) revision 0x0016, manufacturer 0x02e5
[00:00:00.336,000] <inf> bt_hci_core: LMP: version 5.0 (0x09) subver 0x0016
[00:00:00.337,000] <inf> bt_mesh_provisionee: Device UUID: 54320487-0860-0000-0000-000000000000
Mesh initialized
OOB Number: 1250
[00:00:25.321,000] <wrn> bt_conn: Timeout discarded. No blocking in syswq.
[00:00:25.322,000] <wrn> bt_conn: Timeout discarded. No blocking in syswq.
[00:00:25.322,000] <wrn> bt_conn: Timeout discarded. No blocking in syswq.
[00:00:30.851,000] <inf> bt_mesh_main: Primary Element: 0x0002
[00:00:30.860,000] <err> os: 
[00:00:30.860,000] <err> os:  mcause: 1, Instruction Access fault
[00:00:30.860,000] <err> os:   mtval: 0
[00:00:30.860,000] <err> os:      a0: fffffffc    t0: 4038fcac
[00:00:30.860,000] <err> os:      a1: 00000000    t1: 40000df8
[00:00:30.860,000] <err> os:      a2: 00000088    t2: ffffffff
[00:00:30.860,000] <err> os:      a3: 00000008    t3: ffff0000
[00:00:30.860,000] <err> os:      a4: 000000f7    t4: 00000005
[00:00:30.860,000] <err> os:      a5: 00000028    t5: 0000007f
[00:00:30.860,000] <err> os:      a6: 00000116    t6: 00000010
[00:00:30.860,000] <err> os:      a7: 00000000
[00:00:30.860,000] <err> os:      sp: 3fc96890
[00:00:30.860,000] <err> os:      ra: 00000000
[00:00:30.860,000] <err> os:    mepc: 00000000
[00:00:30.860,000] <err> os: mstatus: 00001880
[00:00:30.860,000] <err> os: 
[00:00:30.860,000] <err> os: call trace:
[00:00:30.860,000] <err> os: 
[00:00:30.860,000] <err> os: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
[00:00:30.860,000] <err> os: Current thread: 0x3fc9e618 (unknown)
[00:00:30.896,000] <err> os: Halting system

Not sure if this particular log is from 3.7, 4.0 or just main (tested all of them with basically the same result). Hope this is the right place to submit such issues :)

@rftafas
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rftafas commented Jan 31, 2025

It is not a bug because this is unsupported. While we have feedback from people saying BT mesh works, it's marked as unsupported due to lack of testing (our side) or more reliable feedback, with the tests executed, set-up, etc, then asking here to change status.

As for where to add this... You should open a feature request (GH issues) about bt-mesh (if one is not there yet) and then comment these findings there.

@cc-zelp
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cc-zelp commented Jan 31, 2025

Hello, is low power mode available? I'm aware it's not checked off on the table but I see light/deep sleep examples + read some forums online where it might be.

Thank you.

https://docs.zephyrproject.org/latest/samples/boards/espressif/index.html

@rftafas
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rftafas commented Jan 31, 2025

Hello, is low power mode available? I'm aware it's not checked off on the table but I see light/deep sleep examples + read some forums online where it might be.

Only deep sleep. You can also use RTC RAM to save data between deep sleep cycles.

@DBS06
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DBS06 commented Feb 4, 2025

Hi @sylvioalves,

I want to make a contribution to this project, particulary regarding the USB OTG (as I am exactly from that team).

I would like to ask is there any suggestion (notes, lists of issues, so anything), from where to start?

Thanks.

Please do that, that would be awesome and would be a real help me for porting the of the Adafruit-ESP32-S2 Feather Boards to Zephyr. Right now I have nearly everything running except that someone will not be able to see a serial output over the USB-C Port, because USB-OTG is currently not supported and the only way to get some feedback from the board is currently to hook up an USB-to-RS232 converter on the dedicated RX/TX pins from this board.

@tannewt
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tannewt commented Feb 4, 2025

FYI, I've start an Adafruit repo for Zephyr board definitions of Adafruit boards: https://github.com/adafruit/zephyr-support

We should have the first few boards there in the next few weeks.

We're also working to integrate TinyUSB with Zephyr. That should enable USB support on ESP. hathach/tinyusb#2962

We're moving CircuitPython onto Zephyr so you'll see more Adafruit funded Zephyr work. (Adafruit funds TinyUSB as well.)

@DBS06
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DBS06 commented Feb 4, 2025

Nice to hear, as you probably already saw, I started to port the Adafruit ESP32-S2 feather boards, my branch could be found here https://github.com/DBS06/zephyr/tree/esp32s2_tft_feather/boards/adafruit/feather_esp32s2_tft

@DRNadler
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DRNadler commented Feb 4, 2025 via email

@rftafas
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rftafas commented Feb 5, 2025

@roma-jam Have you advanced on USB effort?

We started to work on it, if you are far advanced, please, share a draft PR so we can contribute. Otherwise we will move ahead internally.

@roma-jam
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roma-jam commented Feb 5, 2025

Hi @rftafas,

Thanks, but I don’t have anything so far, as I don’t have any experience with Zephyr.

But for the past two days I understood how to build/debug example with the ucd on s3 and interact with hal/espressif module within the Zephyr.
So, I will notify you if there will be anything from my side, what can be called “draft PR”.

@tannewt
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tannewt commented Feb 7, 2025

But, Zephyr already has a USB stack?

It has two, but we already have TinyUSB integration in CircuitPython. We'd rather use that.

Can you say a few words about what approach is taken here Scott?

My goal is for TinyUSB to work as a Zephyr module. It can use the device tree definitions for USB without enabling the Zephyr USB stack. Instead, TinyUSB can hook in instead.

TinyUSB also gets a Zephyr OSAL so that it uses Zephyr queues and locks and such.

Also, a big problem for some of us is lack of USB-OTG support. Will this help?

Problem with TinyUSB? I think that support is orthogonal to Zephyr support. It is also something we'd like to see happen but isn't urgent.

@rftafas
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rftafas commented Feb 10, 2025

My goal is for TinyUSB to work as a Zephyr module. It can use the device tree definitions for USB without enabling the Zephyr USB stack. Instead, TinyUSB can hook in instead.

TinyUSB also gets a Zephyr OSAL so that it uses Zephyr queues and locks and such.

If TinyUSB uses Zephyr APIs to access USB hardware, then it needs the USB-OTG peripheral supported. It is not, currently and it is a WIP.

@tannewt
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tannewt commented Feb 10, 2025

TinyUSB isn't using the Zephyr API to talk to the peripheral. It uses a vendor HAL or registers directly.

@RootLUG
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RootLUG commented Mar 19, 2025

Hello,
thank you for the effort to port the esp32 to Zephyr! I have tried to use it recently on ESP32-C6 devkit. In the table the wifi is marked as supported. When I enabled the wifi and attempted to use it (or doing wifi scan in shell), it causes the board to restart (even after generously increasing mem sizes).
Should I report this as a separate issue or is wifi for c6 still a WIP?

@sylvioalves
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Hello, thank you for the effort to port the esp32 to Zephyr! I have tried to use it recently on ESP32-C6 devkit. In the table the wifi is marked as supported. When I enabled the wifi and attempted to use it (or doing wifi scan in shell), it causes the board to restart (even after generously increasing mem sizes). Should I report this as a separate issue or is wifi for c6 still a WIP?

@RootLUG, can you provide which Zephyr rev you tested and also the log output?

@RootLUG
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RootLUG commented Mar 20, 2025

@sylvioalves here are the logs. I am using latest zephyr on macos platform (Zephyr version: 4.1.99, build: v4.1.0-837-g62f5386518a0), the sample is from wifi_shell on esp32c6_devkitc but it exhibits the same behaviour when I use a custom pcb with c6 or non sample code where I attempt initialize wifi interface manually

❯ west espressif monitor
Serial port /dev/cu.usbserial-586C0478031
Connecting....
Detecting chip type... ESP32-C6
--- idf_monitor on /dev/cu.usbserial-586C0478031 115200 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
ESP-ROM:esp32c6-20220919
Build:Sep 19 2022
rst:0x1 (POWERON),boot:0xe (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:2
load:0x40800000,len:0x210b4
load:0x408210d0,len:0x3c38
SHA-256 comparison failed:
Calculated: edb55833fe0d2bc512369bb530ccf5720fdad260bf8a3145cff7b80ecdbb6c46
Expected: 00000000d0b20000000000000000000000000000000000000000000000000000
Attempting to boot anyway...
entry 0x40803626
I (96) soc_init: ESP Simple boot
I (96) soc_init: compile time Mar 20 2025 16:51:55
I (97) soc_init: chip revision: v0.0
I (97) flash_init: SPI Speed      : 80MHz
I (99) flash_init: SPI Mode       : DIO
I (103) flash_init: SPI Flash Size : 8MB
I (106) boot: DRAM: lma 0x00000020 vma 0x40800000 len 0x210b4  (135348)
I (113) boot: DRAM: lma 0x000210dc vma 0x408210d0 len 0x3c38   (15416)
I (119) boot: IRAM: lma 0x00024d28 vma 0x00000000 len 0xb2d0   (45776)
I (125) boot: IMAP: lma 0x00030000 vma 0x42800000 len 0x199bc  (104892)
I (131) boot: IRAM: lma 0x000499c4 vma 0x00000000 len 0x6634   (26164)
I (138) boot: IMAP: lma 0x00050000 vma 0x42000000 len 0x5e374  (385908)
I (144) boot: Image with 6 segments
I (147) boot: IROM segment: paddr=00050000h, vaddr=42000000h, size=5E374h (385908) map
I (155) boot: DROM segment: paddr=00030000h, vaddr=42800000h, size=199C0h (104896) map
I (174) boot: libc heap size 243 kB.
I (174) spi_flash: detected chip: gd
I (174) spi_flash: flash io: dio
W (175) spi_flash: Detected size(16384k) larger than the size in the binary image header(8192k). Using the size in the binary image header.

*** Booting Zephyr OS build v4.1.0-837-g62f5386518a0 ***
uart:~$ wifi scan
Scan requested
uart:~$ ESP-ROM:esp32c6-20220919
Build:Sep 19 2022
rst:0xf (LP_BOD_SYS),boot:0xe (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:2
load:0x40800000,len:0x210b4
load:0x408210d0,len:0x3c38
SHA-256 comparison failed:
Calculated: edb55833fe0d2bc512369bb530ccf5720fdad260bf8a3145cff7b80ecdbb6c46
Expected: 00000000d0b20000000000000000000000000000000000000000000000000000
Attempting to boot anyway...
entry 0x40803626
I (96) soc_init: ESP Simple boot
I (96) soc_init: compile time Mar 20 2025 16:51:55
I (97) soc_init: chip revision: v0.0
I (97) flash_init: SPI Speed      : 80MHz
I (99) flash_init: SPI Mode       : DIO
I (103) flash_init: SPI Flash Size : 8MB
I (106) boot: DRAM: lma 0x00000020 vma 0x40800000 len 0x210b4  (135348)
I (113) boot: DRAM: lma 0x000210dc vma 0x408210d0 len 0x3c38   (15416)
I (119) boot: IRAM: lma 0x00024d28 vma 0x00000000 len 0xb2d0   (45776)
I (125) boot: IMAP: lma 0x00030000 vma 0x42800000 len 0x199bc  (104892)
I (132) boot: IRAM: lma 0x000499c4 vma 0x00000000 len 0x6634   (26164)
I (138) boot: IMAP: lma 0x00050000 vma 0x42000000 len 0x5e374  (385908)
I (144) boot: Image with 6 segments
I (147) boot: IROM segment: paddr=00050000h, vaddr=42000000h, size=5E374h (385908) map
I (155) boot: DROM segment: paddr=00030000h, vaddr=42800000h, size=199C0h (104896) map
I (174) boot: libc heap size 243 kB.
I (174) spi_flash: detected chip: gd
I (174) spi_flash: flash io: dio
W (175) spi_flash: Detected size(16384k) larger than the size in the binary image header(8192k). Using the size in the binary image header.

[00:00:00.033,000] <err> entropy: Error enabling TRNG clock
*** Booting Zephyr OS build v4.1.0-837-g62f5386518a0 ***
uart:~$ net iface

Interface wlan0 (0x40824a58) (WiFi) [1]
===============================
Interface is down.

@guenterfischer
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@sylvioalves Are there any plans to add support for Bluetooth to the ESP32-C6? If I remember correctly, it was listed as "work in progress" in the middle of last year. Is there a reason why it's now just marked as unsupported?

@rftafas
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rftafas commented Apr 14, 2025

@sylvioalves Are there any plans to add support for Bluetooth to the ESP32-C6? If I remember correctly, it was listed as "work in progress" in the middle of last year. Is there a reason why it's now just marked as unsupported?

Unsupported is the current status. We know some users got hands on to make it work, but I got no info on results. It is on roadmap.

@ruehlchris
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ruehlchris commented Apr 23, 2025

ESP32C6
I recently got some Seeed Studio Xiao esp32C6 and INMP441 Mems running i2s to find out the C6 not yet have the support added.

I worked on this yesterday make a patch to add the I2S to dtsi and header files. Now I'm able to run a "west build" but stuck at the point that the hal function from the esp32 blob is not linked.

drivers/i2s/i2s_esp32.c:134: undefined reference to i2s_hal_std_enable_tx_channel`

I need a hint!

Here is my patch
xiao_esp32c6_i2s.zip

Happy hacking.
Chris

Fixed my build issue, under modules/hal/espressif

diff --git a/zephyr/esp32c6/CMakeLists.txt b/zephyr/esp32c6/CMakeLists.txt
index 1878f4c16a..78c592ffaf 100644
--- a/zephyr/esp32c6/CMakeLists.txt
+++ b/zephyr/esp32c6/CMakeLists.txt
@@ -299,6 +299,11 @@ if(CONFIG_SOC_SERIES_ESP32C6)
../../components/hal/i2c_hal.c
)

+ zephyr_sources_ifdef(
+ CONFIG_I2S_ESP32
+ ../../components/hal/i2s_hal.c
+ )
+

@ruehlchris
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ESP32C6 I recently got some Seeed Studio Xiao esp32C6 and INMP441 Mems running i2s to find out the C6 not yet have the support added.

I worked on this yesterday make a patch to add the I2S to dtsi and header files. Now I'm able to run a "west build" but stuck at the point that the hal function from the esp32 blob is not linked.

drivers/i2s/i2s_esp32.c:134: undefined reference to i2s_hal_std_enable_tx_channel`

I need a hint!

Here is my patch xiao_esp32c6_i2s.zip

Happy hacking. Chris

Fixed my build issue, under modules/hal/espressif

diff --git a/zephyr/esp32c6/CMakeLists.txt b/zephyr/esp32c6/CMakeLists.txt index 1878f4c16a..78c592ffaf 100644 --- a/zephyr/esp32c6/CMakeLists.txt +++ b/zephyr/esp32c6/CMakeLists.txt @@ -299,6 +299,11 @@ if(CONFIG_SOC_SERIES_ESP32C6) ../../components/hal/i2c_hal.c )

  • zephyr_sources_ifdef( + CONFIG_I2S_ESP32 + ../../components/hal/i2s_hal.c + ) +

Can confirm that the BCLK , WS and SD is working.
Tested with 22050khz and 44100khz.

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