diff --git a/include/dfu/mcuboot_boot_mode.h b/include/dfu/mcuboot_boot_mode.h
new file mode 100644
index 000000000000..ea26a007f588
--- /dev/null
+++ b/include/dfu/mcuboot_boot_mode.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2022 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef ZEPHYR_INCLUDE_MCUBOOT_BOOT_MODE_H_
+
+#define BOOT_MODE_REQ_NORMAL		0x00
+#define BOOT_MODE_REQ_RECOVERY_DFU	0x01
+
+/**
+ * Set bootloader mode
+ *
+ * Using this the application can request specific bootloader mode.
+ * MCUboot might enter this mode once system reboot.
+ *
+ * @param mode requested mode
+ *
+ * @retval 0 on success, negative errno code on fail.
+ */
+int boot_mode_set(uint8_t mode);
+
+/**
+ * Get bootloader mode
+ *
+ * Using this the bootloader might obtain the mode requested by the application.
+ * Only first call returns valid value as the implementation should cleanup
+ * hardware resource used for transferring the mode from the application.
+ *
+ * @retval bootloader mode
+ */
+uint8_t boot_mode_get(void);
+
+#endif /* ZEPHYR_INCLUDE_MCUBOOT_BOOT_MODE_H_ */
diff --git a/soc/arm/nordic_nrf/nrf52/soc.c b/soc/arm/nordic_nrf/nrf52/soc.c
index e1e63e9f874e..a10daad45d0b 100644
--- a/soc/arm/nordic_nrf/nrf52/soc.c
+++ b/soc/arm/nordic_nrf/nrf52/soc.c
@@ -47,6 +47,22 @@ extern void z_arm_nmi_init(void);
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);
 
+int soc_mcuboot_mode_set(uint8_t mode)
+{
+	nrf_power_gpregret2_set(NRF_POWER, mode);
+
+	return 0;
+}
+
+uint8_t soc_mcuboot_mode_get(void)
+{
+	uint8_t mode = nrf_power_gpregret2_get(NRF_POWER);
+
+	nrf_power_gpregret2_set(NRF_POWER, 0);
+
+	return mode;
+}
+
 /* Overrides the weak ARM implementation:
    Set general purpose retention register and reboot */
 void sys_arch_reboot(int type)
diff --git a/soc/arm/nordic_nrf/nrf53/soc.c b/soc/arm/nordic_nrf/nrf53/soc.c
index 6d2005db9b92..cd57ccefa470 100644
--- a/soc/arm/nordic_nrf/nrf53/soc.c
+++ b/soc/arm/nordic_nrf/nrf53/soc.c
@@ -25,11 +25,13 @@
 #include <hal/nrf_gpio.h>
 #include <hal/nrf_oscillators.h>
 #include <hal/nrf_regulators.h>
+#include <hal/nrf_power.h>
 #elif defined(CONFIG_SOC_NRF5340_CPUNET)
 #include <hal/nrf_nvmc.h>
 #endif
 #include <soc_secure.h>
 
+
 #define PIN_XL1 0
 #define PIN_XL2 1
 
@@ -66,6 +68,24 @@ extern void z_arm_nmi_init(void);
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);
 
+#if defined(CONFIG_SOC_NRF5340_CPUAPP)
+int soc_mcuboot_mode_set(uint8_t mode)
+{
+	nrf_power_gpregret2_set(NRF_POWER, mode);
+
+	return 0;
+}
+
+uint8_t soc_mcuboot_mode_get(void)
+{
+	uint8_t mode = nrf_power_gpregret2_get(NRF_POWER);
+
+	nrf_power_gpregret2_set(NRF_POWER, 0);
+
+	return mode;
+}
+#endif
+
 static int nordicsemi_nrf53_init(const struct device *arg)
 {
 	uint32_t key;
diff --git a/soc/arm/nordic_nrf/nrf91/soc.c b/soc/arm/nordic_nrf/nrf91/soc.c
index a65e8cc6847a..547d1a85f6a2 100644
--- a/soc/arm/nordic_nrf/nrf91/soc.c
+++ b/soc/arm/nordic_nrf/nrf91/soc.c
@@ -17,6 +17,7 @@
 #include <arch/arm/aarch32/cortex_m/cmsis.h>
 #include <soc/nrfx_coredep.h>
 #include <logging/log.h>
+#include <hal/nrf_power.h>
 
 #ifdef CONFIG_RUNTIME_NMI
 extern void z_arm_nmi_init(void);
@@ -34,6 +35,22 @@ extern void z_arm_nmi_init(void);
 #define LOG_LEVEL CONFIG_SOC_LOG_LEVEL
 LOG_MODULE_REGISTER(soc);
 
+int soc_mcuboot_mode_set(uint8_t mode)
+{
+	nrf_power_gpregret_ext_set(NRF_POWER, 1, mode);
+
+	return 0;
+}
+
+uint8_t soc_mcuboot_mode_set(void)
+{
+	uint8_t mode = nrf_power_gpregret_ext_get(NRF_POWER, 1);
+
+	nrf_power_gpregret_ext_set(NRF_POWER, 1, 0);
+
+	return mode;
+}
+
 static int nordicsemi_nrf91_init(const struct device *arg)
 {
 	uint32_t key;
diff --git a/subsys/CMakeLists.txt b/subsys/CMakeLists.txt
index 35f47bfb03fb..a38323200d2e 100644
--- a/subsys/CMakeLists.txt
+++ b/subsys/CMakeLists.txt
@@ -12,7 +12,7 @@ add_subdirectory_ifdef(CONFIG_EMUL emul)
 add_subdirectory(fs)
 add_subdirectory(ipc)
 add_subdirectory(mgmt)
-add_subdirectory_ifdef(CONFIG_MCUBOOT_IMG_MANAGER  dfu)
+add_subdirectory(dfu)
 add_subdirectory_ifdef(CONFIG_NET_BUF              net)
 add_subdirectory_ifdef(CONFIG_USB_DEVICE_STACK     usb)
 add_subdirectory(random)
diff --git a/subsys/dfu/CMakeLists.txt b/subsys/dfu/CMakeLists.txt
index af99c950e747..93a1f9824cd5 100644
--- a/subsys/dfu/CMakeLists.txt
+++ b/subsys/dfu/CMakeLists.txt
@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: Apache-2.0
 
-add_subdirectory(boot)
-add_subdirectory(img_util)
+add_subdirectory_ifdef(CONFIG_MCUBOOT_IMG_MANAGER boot)
+add_subdirectory_ifdef(CONFIG_MCUBOOT_IMG_MANAGER img_util)
+add_subdirectory(boot_mode)
diff --git a/subsys/dfu/Kconfig b/subsys/dfu/Kconfig
index 8a934766a250..8b2826a7c3b3 100644
--- a/subsys/dfu/Kconfig
+++ b/subsys/dfu/Kconfig
@@ -7,6 +7,7 @@
 # DFU
 #
 
+menu "DFU"
 menuconfig IMG_MANAGER
 	bool "DFU image manager"
 	select STREAM_FLASH
@@ -31,10 +32,10 @@ config MCUBOOT_IMG_MANAGER
 
 endchoice
 
+if MCUBOOT_IMG_MANAGER
 config MCUBOOT_SHELL
 	bool "MCUboot shell"
 	default y
-	depends on MCUBOOT_IMG_MANAGER
 	depends on SHELL
 	help
 	  Enable shell module, which provides information about image slots and
@@ -44,7 +45,6 @@ config MCUBOOT_SHELL
 config MCUBOOT_TRAILER_SWAP_TYPE
 	bool "use trailer's swap_type field"
 	default y
-	depends on MCUBOOT_IMG_MANAGER
 	help
 	  Enables usage swap type field which is required after
 	  "Fix double swap on interrupted revert"  mcuboot patch
@@ -54,7 +54,6 @@ config MCUBOOT_TRAILER_SWAP_TYPE
 
 config IMG_BLOCK_BUF_SIZE
 	int "Image writer buffer size"
-	depends on MCUBOOT_IMG_MANAGER
 	default 512
 	help
 	  Size (in Bytes) of buffer for image writer. Must be a multiple of
@@ -62,7 +61,6 @@ config IMG_BLOCK_BUF_SIZE
 
 config IMG_ERASE_PROGRESSIVELY
 	bool "Erase flash progressively when receiving new firmware"
-	depends on MCUBOOT_IMG_MANAGER
 	select STREAM_FLASH_ERASE
 	help
 	  If enabled, flash is erased as necessary when receiving new firmware,
@@ -72,7 +70,6 @@ config IMG_ERASE_PROGRESSIVELY
 
 config IMG_ENABLE_IMAGE_CHECK
 	bool "Image check functions"
-	depends on MCUBOOT_IMG_MANAGER
 	select FLASH_AREA_CHECK_INTEGRITY
 	help
 	  If enabled, there will be available the function to check flash
@@ -81,6 +78,8 @@ config IMG_ENABLE_IMAGE_CHECK
 	  Another use is to ensure that firmware upgrade routines from internet
 	  server to flash slot are performing properly.
 
+endif # MCUBOOT_IMG_MANAGER
+
 module = IMG_MANAGER
 module-str = image manager
 source "subsys/logging/Kconfig.template.log_config"
@@ -96,3 +95,12 @@ config UPDATEABLE_IMAGE_NUMBER
 endif
 
 endif # IMG_MANAGER
+
+config MCUBOOT_BOOT_MODE_API
+	bool "API for request bootloader mode"
+	help
+	  Application can request specific bootloader mode. MCUboot might enter
+	  this mode once system reboot. Implementations of this use SoC specific
+	  resources, like a reset retention register.
+
+endmenu # DFU
diff --git a/subsys/dfu/boot_mode/CMakeLists.txt b/subsys/dfu/boot_mode/CMakeLists.txt
new file mode 100644
index 000000000000..c01b33df8cc2
--- /dev/null
+++ b/subsys/dfu/boot_mode/CMakeLists.txt
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: Apache-2.0
+
+zephyr_sources_ifdef(CONFIG_MCUBOOT_BOOT_MODE_API mcuboot_boot_mode.c)
diff --git a/subsys/dfu/boot_mode/mcuboot_boot_mode.c b/subsys/dfu/boot_mode/mcuboot_boot_mode.c
new file mode 100644
index 000000000000..f0045ef0d290
--- /dev/null
+++ b/subsys/dfu/boot_mode/mcuboot_boot_mode.c
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2022 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#include <zephyr.h>
+
+extern int soc_mcuboot_mode_set(uint8_t mode);
+extern uint8_t  soc_mcuboot_mode_get(void);
+
+int boot_mode_set(uint8_t mode)
+{
+	return soc_mcuboot_mode_set(mode);
+}
+
+uint8_t boot_mode_get(void)
+{
+	return soc_mcuboot_mode_get();
+}