From 0f8c49508ae893c9dce320b3f2d2169935ecfb43 Mon Sep 17 00:00:00 2001 From: Andy Gross Date: Thu, 13 Jul 2017 10:53:58 +0200 Subject: [PATCH 01/10] script: exctract_dts_include: generate dts extracted structures This is a preparation work for dts based driver and pinctrl initialisation/instantiation code generation. When parsing dts nodes, a struct dict is generated that holds properties for choosen nodes. As a side change, defs and structs dicts are made global Signed-off-by: Andy Gross --- scripts/dts/extract_dts_includes.py | 271 +++++++++++++++++++++++----- 1 file changed, 229 insertions(+), 42 deletions(-) diff --git a/scripts/dts/extract_dts_includes.py b/scripts/dts/extract_dts_includes.py index 7bdfc1464ac2..e10f54bb777e 100755 --- a/scripts/dts/extract_dts_includes.py +++ b/scripts/dts/extract_dts_includes.py @@ -3,10 +3,11 @@ # vim: ai:ts=4:sw=4 import sys -from os import listdir +from os import listdir, walk import os, fnmatch import re import yaml +import pprint import argparse import collections @@ -18,6 +19,8 @@ aliases = {} chosen = {} reduced = {} +defs = {} +structs = {} def convert_string_to_label(s): @@ -144,7 +147,7 @@ def extractFile(self, filename): return yaml.load(f, Loader) -def insert_defs(node_address, defs, new_defs, new_aliases): +def insert_defs(node_address, new_defs, new_aliases): if node_address in defs: if 'aliases' in defs[node_address]: defs[node_address]['aliases'].update(new_aliases) @@ -159,6 +162,26 @@ def insert_defs(node_address, defs, new_defs, new_aliases): return +def insert_structs(node_address, deflabel, new_structs): + if not isinstance(new_structs, list): + list_structs = [new_structs] + else: + list_structs = new_structs + for s in list_structs: + if node_address in structs: + if deflabel in structs[node_address]: + for k in s.keys(): + if len(s[k]) > 0: + structs[node_address][deflabel][k].append(s[k][0]) + else: + structs[node_address][deflabel] = s + else: + structs[node_address] = {} + structs[node_address][deflabel] = s + + return + + def find_node_by_path(nodes, path): d = nodes for k in path[1:].split('/'): @@ -198,7 +221,7 @@ def find_parent_irq_node(node_address): return reduced[phandles[interrupt_parent]] -def extract_interrupts(node_address, yaml, y_key, names, defs, def_label): +def extract_interrupts(node_address, yaml, y_key, names, def_label): node = reduced[node_address] try: @@ -211,6 +234,7 @@ def extract_interrupts(node_address, yaml, y_key, names, defs, def_label): l_base = def_label.split('/') index = 0 + prop_structs = {'data': [], 'defs': [], 'members': []} while props: prop_def = {} prop_alias = {} @@ -231,19 +255,32 @@ def extract_interrupts(node_address, yaml, y_key, names, defs, def_label): l_cell_prefix = [yaml[get_compat(irq_parent)].get( 'cell_string', []).upper()] + cell_data = [] + cell_defs = {'labels': [], 'aliases': []} for i in range(cell_parent['props']['#interrupt-cells']): l_cell_name = [cell_yaml['#cells'][i].upper()] if l_cell_name == l_cell_prefix: l_cell_name = [] l_fqn = '_'.join(l_base + l_cell_prefix + l_idx + l_cell_name) - prop_def[l_fqn] = props.pop(0) + val = props.pop(0) + prop_def[l_fqn] = val + cell_defs['labels'].append(l_fqn) + cell_data.append(val) if len(name): - alias_list = l_base + l_cell_prefix + name + l_cell_name - prop_alias['_'.join(alias_list)] = l_fqn + prop_alias['_'.join(l_base + + l_cell_prefix + + name + + l_cell_name)] = l_fqn + cell_defs['aliases'].append('_'.join(l_base + + name + l_cell_prefix)) + prop_structs['data'].append(cell_data) + prop_structs['defs'].append(cell_defs) + prop_structs['members'].append(cell_yaml['#cells']) index += 1 - insert_defs(node_address, defs, prop_def, prop_alias) + insert_defs(node_address, prop_def, prop_alias) + insert_structs(node_address, 'interrupts', prop_structs) return @@ -271,12 +308,17 @@ def extract_reg_prop(node_address, names, defs, def_label, div, post_label): l_addr = [convert_string_to_label(post_label).upper()] l_size = ["SIZE"] + prop_struct = {'data': [], 'defs': [], 'members': []} while props: prop_def = {} prop_alias = {} addr = 0 size = 0 l_idx = [str(index)] + entry_struct = {} + entry_members = ['base', 'size'] + entry_data = [] + entry_defs = {'labels': [], 'aliases': []} try: name = [names.pop(0).upper()] @@ -290,23 +332,41 @@ def extract_reg_prop(node_address, names, defs, def_label, div, post_label): l_addr_fqn = '_'.join(l_base + l_addr + l_idx) l_size_fqn = '_'.join(l_base + l_size + l_idx) + entry_data = [] + if address_cells: prop_def[l_addr_fqn] = hex(addr) + entry_defs['labels'].append(l_addr_fqn) if size_cells: prop_def[l_size_fqn] = int(size / div) + entry_defs['labels'].append(l_size_fqn) if len(name): if address_cells: prop_alias['_'.join(l_base + name + l_addr)] = l_addr_fqn + entry_defs['aliases'].append( + {'_'.join(l_base + name + l_addr): l_addr_fqn}) if size_cells: prop_alias['_'.join(l_base + name + l_size)] = l_size_fqn + entry_defs['aliases'].append( + {'_'.join(l_base + name + l_size): l_size_fqn}) if index == 0: if address_cells: prop_alias['_'.join(l_base + l_addr)] = l_addr_fqn + entry_defs['aliases'].append( + {'_'.join(l_base + l_addr): l_addr_fqn}) if size_cells: prop_alias['_'.join(l_base + l_size)] = l_size_fqn + entry_defs['aliases'].append( + {'_'.join(l_base + l_size): l_size_fqn}) + + entry_data = [hex(addr), int(size / div)] + prop_struct['defs'].append(entry_defs) + prop_struct['data'].append(entry_data) + prop_struct['members'].append(entry_members) - insert_defs(node_address, defs, prop_def, prop_alias) + insert_defs(node_address, prop_def, prop_alias) + insert_structs(node_address, 'reg', prop_struct) # increment index for definition creation index += 1 @@ -314,7 +374,9 @@ def extract_reg_prop(node_address, names, defs, def_label, div, post_label): return -def extract_cells(node_address, yaml, y_key, names, index, prefix, defs, + + +def extract_cells(node_address, yaml, y_key, names, index, prefix, def_label): try: props = list(reduced[node_address]['props'].get(y_key)) @@ -341,7 +403,11 @@ def extract_cells(node_address, yaml, y_key, names, index, prefix, defs, prop_def = {} prop_alias = {} + prop_struct = {'data': [], 'defs': [], 'members': []} + cell_data = [] + cell_members = cell_yaml['#cells'] + cell_defs = {'labels': [], 'aliases': []} for k in cell_parent['props'].keys(): if k[0] == '#' and '-cells' in k: for i in range(cell_parent['props'].get(k)): @@ -351,37 +417,57 @@ def extract_cells(node_address, yaml, y_key, names, index, prefix, defs, else: label = l_base + l_cell + l_cellname + l_idx label_name = l_base + name + l_cellname - prop_def['_'.join(label)] = props.pop(0) + val = props.pop(0) + cell_data.append(val) + prop_def['_'.join(label)] = val + cell_defs['labels'].append('_'.join(label)) if len(name): prop_alias['_'.join(label_name)] = '_'.join(label) + cell_defs['aliases'].append( + {'_'.join(label_name): '_'.join(label)}) if index == 0: prop_alias['_'.join(label[:-1])] = '_'.join(label) + cell_defs['aliases'].append( + {'_'.join(label[:-1]): '_'.join(label)}) + - insert_defs(node_address, defs, prop_def, prop_alias) + prop_struct['data'].append(cell_data) + prop_struct['members'].append(cell_members) + prop_struct['defs'].append(cell_defs) + insert_defs(node_address, prop_def, prop_alias) + insert_structs(node_address, cell_yaml.get('cell_string'), prop_struct) # recurse if we have anything left if len(props): extract_cells(node_address, yaml, y_key, names, - index + 1, prefix, defs, def_label) + index + 1, prefix, def_label) return -def extract_pinctrl(node_address, yaml, pinconf, names, index, defs, +def extract_pinctrl(node_address, yaml, pinconf, names, index, def_label): prop_list = [] + name_list = [] if not isinstance(pinconf, list): prop_list.append(pinconf) + name_list.append(names) else: prop_list = list(pinconf) + name_list = list(names) def_prefix = def_label.split('_') + target_node = node_address prop_def = {} - for p in prop_list: + prop_struct = {'data': [], 'defs': [], 'members': [], 'instance': []} + for i in range(0, len(prop_list)): + p = prop_list[i] + name = name_list[i] pin_node_address = phandles[p] + pin_entry = reduced[pin_node_address] parent_address = '/'.join(pin_node_address.split('/')[:-1]) pin_subnode = '/'.join(pin_node_address.split('/')[-1:]) pin_parent = reduced[parent_address] @@ -389,6 +475,9 @@ def extract_pinctrl(node_address, yaml, pinconf, names, index, defs, cell_prefix = cell_yaml.get('cell_string', None) post_fix = [] + cell_data = [] + cell_members = [] + cell_defs = {'labels': [], 'aliases': []} if cell_prefix is not None: post_fix.append(cell_prefix) @@ -398,25 +487,65 @@ def extract_pinctrl(node_address, yaml, pinconf, names, index, defs, pin_label = def_prefix + post_fix + subnode.split('/')[-2:] for i, cells in enumerate(reduced[subnode]['props']): - key_label = list(pin_label) + \ - [cell_yaml['#cells'][0]] + [str(i)] - func_label = key_label[:-2] + \ - [cell_yaml['#cells'][1]] + [str(i)] - key_label = convert_string_to_label( - '_'.join(key_label)).upper() - func_label = convert_string_to_label( - '_'.join(func_label)).upper() - - prop_def[key_label] = cells - prop_def[func_label] = \ - reduced[subnode]['props'][cells] - - insert_defs(node_address, defs, prop_def, {}) - - -def extract_single(node_address, yaml, prop, key, prefix, defs, def_label): + if len(cell_yaml['#cells']) == 2: + key_label = list(pin_label) + \ + [cell_yaml['#cells'][0]] + [str(i)] + func_label = key_label[:-2] + \ + [cell_yaml['#cells'][1]] + [str(i)] + key_label = convert_string_to_label( + '_'.join(key_label)).upper() + func_label = convert_string_to_label( + '_'.join(func_label)).upper() + + prop_def[key_label] = reduced[subnode]['props'][cells] + prop_def[func_label] = \ + reduced[subnode]['props'][cell_yaml['#cells'][1]] + cell_defs['labels'].append(key_label) + cell_defs['labels'].append(func_label) + + elif len(cell_yaml['#cells']) == 1: + key_label = list(pin_label) + \ + [cell_yaml['#cells'][0]] + [cells] + key_label = convert_string_to_label( + '_'.join(key_label)).upper() + + prop_def[key_label] = reduced[subnode]['props'][cells] + cell_defs['labels'].append(key_label) + + if len(cell_yaml['#cells']) == 2: + pin_list = [] + pin_list = \ + reduced[subnode]['props'].get(cell_yaml['#cells'][0]) + cell_members.append(name) + for i in pin_list: + pin_data = [] + pin_data.append(i) + pin_data.append( + reduced[subnode]['props'][cell_yaml['#cells'][1]]) + cell_data.append(pin_data) + + elif len(cell_yaml['#cells']) == 1: + cell_members.append(name) + for cells in reduced[subnode]['props'].keys(): + cell_data.append(reduced[subnode]['props'][cells]) + + prop_struct['data'].append(cell_data) + prop_struct['members'].append(cell_members) + prop_struct['defs'].append(cell_defs) + + if 'label' in pin_parent['props'].keys(): + prop_struct['instance'].append(pin_parent['props']['label']) + + insert_defs(node_address, prop_def, {}) + insert_structs(node_address, 'pinctrl', prop_struct) + + +def extract_single(node_address, yaml, prop, key, prefix, def_label): prop_def = {} + prop_struct = {'data': [], 'defs': [], 'members': []} + prop_data = [] + prop_defs = {'labels': [], 'aliases': []} if isinstance(prop, list): for i, p in enumerate(prop): @@ -425,12 +554,20 @@ def extract_single(node_address, yaml, prop, key, prefix, defs, def_label): if isinstance(p, str): p = "\"" + p + "\"" prop_def[label + '_' + str(i)] = p + prop_data.append(p) + prop_defs['labels'].append(label + '_' + str(i)) + prop_struct['data'].append(prop_data) + prop_struct['defs'].append(prop_defs) + insert_structs(node_address, key, prop_struct) else: k = convert_string_to_label(key).upper() label = def_label + '_' + k if isinstance(prop, str): prop = "\"" + prop + "\"" prop_def[label] = prop + prop_struct['data'].append([prop]) + prop_struct['defs'].append([label]) + insert_structs(node_address, key, prop_struct) if node_address in defs: defs[node_address].update(prop_def) @@ -477,19 +614,19 @@ def extract_property(node_compat, yaml, node_address, y_key, y_val, names, extract_reg_prop(node_address, names, defs, def_label, 1, y_val.get('label', None)) elif y_key == 'interrupts' or y_key == 'interupts-extended': - extract_interrupts(node_address, yaml, y_key, names, defs, def_label) + extract_interrupts(node_address, yaml, y_key, names, def_label) elif 'pinctrl-' in y_key: p_index = int(y_key.split('-')[1]) extract_pinctrl(node_address, yaml, reduced[node_address]['props'][y_key], - names[p_index], p_index, defs, def_label) + names[p_index], p_index, def_label) elif 'clocks' in y_key: extract_cells(node_address, yaml, y_key, - names, 0, prefix, defs, def_label) + names, 0, prefix, def_label) else: extract_single(node_address, yaml, reduced[node_address]['props'][y_key], y_key, - prefix, defs, def_label) + prefix, def_label) return @@ -623,7 +760,7 @@ def print_key_value(k, v, tabstop): return -def generate_keyvalue_file(defs, args): +def generate_keyvalue_file(args): node_keys = sorted(defs.keys()) for node in node_keys: @@ -642,7 +779,7 @@ def generate_keyvalue_file(defs, args): sys.stdout.write("\n") -def generate_include_file(defs, args): +def generate_include_file(args): compatible = reduced['/']['props']['compatible'][0] sys.stdout.write("/**************************************************\n") @@ -714,6 +851,40 @@ def lookup_defs(defs, node, key): return defs[node].get(key, None) + +def generate_structs(args): + # Generate structure information here + # + # structs structure is: + # node_address: + # prop_0: + # single value -or- list -or- list of dicts + # prop_1: + # single value -or- list -or- list of dicts + # ... + # ... + # single value: Just a single piece of data (int or string) + # list: array of int or string + # list of dicts: array of other structs + # + # skip items with None for compat. These are 'special' (flash, etc) + # need to run those through chosen node to see if they match and if + # something should be done. + # + + # iterate over the structs and reconfigure it to collate by compat + for k, v in structs.items(): + compat = get_compat(reduced[k]) + if compat is None: + continue + if compat not in struct_dict: + struct_dict[compat] = [] + struct_dict[compat].append(v) + + # now we can process it most efficiently + # pprint.pprint(struct_dict) + return + def parse_arguments(): rdh = argparse.RawDescriptionHelpFormatter @@ -785,8 +956,18 @@ def main(): # collapse the yaml inherited information yaml_list = yaml_collapse(yaml_list) - defs = {} - structs = {} + + # load zephyr specific nodes + flash = {} + console = {} + sram = {} + if 'zephyr,flash' in chosen: + flash = reduced[chosen['zephyr,flash']] + if 'zephyr,console' in chosen: + console = reduced[chosen['zephyr,console']] + if 'zephyr,sram' in chosen: + sram = reduced[chosen['zephyr,sram']] + for k, v in reduced.items(): node_compat = get_compat(v) if node_compat is not None and node_compat in yaml_list: @@ -827,6 +1008,8 @@ def main(): 'zephyr,flash' in chosen and \ reduced[chosen['zephyr,flash']] is not \ reduced[chosen['zephyr,code-partition']]: + flash_base = lookup_defs(defs, chosen['zephyr,flash'], + 'CONFIG_FLASH_BASE_ADDRESS') part_defs = {} extract_reg_prop(chosen['zephyr,code-partition'], None, part_defs, "PARTITION", 1, 'offset') @@ -840,13 +1023,17 @@ def main(): load_defs['CONFIG_FLASH_LOAD_OFFSET'] = 0 load_defs['CONFIG_FLASH_LOAD_SIZE'] = 0 - insert_defs(chosen['zephyr,flash'], defs, load_defs, {}) + insert_defs(chosen['zephyr,flash'], load_defs, {}) + # pprint.pprint(defs) + # pprint.pprint(structs) # generate include file if args.keyvalue: - generate_keyvalue_file(defs, args) + generate_keyvalue_file(args) + elif args.structs: + generate_structs(args) else: - generate_include_file(defs, args) + generate_include_file(args) if __name__ == '__main__': From 99e1e9f5b737d64c6c0972a84e362fecb04d7140 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 13 Jul 2017 11:06:42 +0200 Subject: [PATCH 02/10] dts: yaml: i2c: add pinctrl property In order to rnabled dts based i2c pinmux generation, add pinctrl node to generic i2c yaml description. Signed-Off-By: Erwan Gouriou --- dts/bindings/i2c/i2c.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/dts/bindings/i2c/i2c.yaml b/dts/bindings/i2c/i2c.yaml index c91913c1132c..364fffb3432f 100644 --- a/dts/bindings/i2c/i2c.yaml +++ b/dts/bindings/i2c/i2c.yaml @@ -30,4 +30,9 @@ properties: category: required description: Human readable string describing the device (used by Zephyr for API name) generation: define + pinctrl-\d+: + type: array + category: optional + description: pinmux information for SCL, SDA + generation: define ... From 59ca9492649de43709067b9bba3d12c40402b778 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 16 Nov 2017 11:21:12 +0100 Subject: [PATCH 03/10] board: Add i2c pinmux on board disco_l475_iot1 Signed-Off-By: Erwan Gouriou --- boards/arm/disco_l475_iot1/disco_l475_iot1.dts | 4 ++++ dts/arm/st/stm32l4-pinctrl.dtsi | 12 ++++++++++++ 2 files changed, 16 insertions(+) diff --git a/boards/arm/disco_l475_iot1/disco_l475_iot1.dts b/boards/arm/disco_l475_iot1/disco_l475_iot1.dts index 6a6fa010440d..ff73a2040bf7 100644 --- a/boards/arm/disco_l475_iot1/disco_l475_iot1.dts +++ b/boards/arm/disco_l475_iot1/disco_l475_iot1.dts @@ -35,11 +35,15 @@ &i2c1 { status = "ok"; clock-frequency = ; + pinctrl-0 = <&i2c1_pins_a>; + pinctrl-names = "default"; }; &i2c2 { status = "ok"; clock-frequency = ; + pinctrl-0 = <&i2c2_pins_a>; + pinctrl-names = "default"; }; &flash0 { diff --git a/dts/arm/st/stm32l4-pinctrl.dtsi b/dts/arm/st/stm32l4-pinctrl.dtsi index 7fd1786a96d0..8a4b94f72b41 100644 --- a/dts/arm/st/stm32l4-pinctrl.dtsi +++ b/dts/arm/st/stm32l4-pinctrl.dtsi @@ -57,6 +57,18 @@ tx = ; }; }; + i2c1_pins_a: i2c1@0 { + sda_scl { + scl = ; + sda = ; + }; + }; + i2c2_pins_a: i2c2@0 { + sda_scl { + scl = ; + sda = ; + }; + }; }; }; }; From e240765c1c19402053161f1e3526c5bdb6d4819e Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 16 Nov 2017 11:26:06 +0100 Subject: [PATCH 04/10] dts: yaml: Add base file for pinmux Add pinmux.yaml file. Get it included by existing pinctrl yaml bindinds. Signed-Off-By: Erwan Gouriou --- dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml | 16 +++--------- dts/bindings/pinctrl/pinmux.yaml | 27 ++++++++++++++++++++ dts/bindings/pinctrl/st,stm32-pinmux.yaml | 17 +++--------- dts/bindings/pinctrl/ti,cc2650-pinmux.yaml | 12 +++------ 4 files changed, 38 insertions(+), 34 deletions(-) create mode 100644 dts/bindings/pinctrl/pinmux.yaml diff --git a/dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml b/dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml index eb49b3518d3c..d1b6086a9fdb 100644 --- a/dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml +++ b/dts/bindings/pinctrl/nxp,kinetis-pinmux.yaml @@ -5,28 +5,20 @@ version: 0.1 description: > This is a representation of the Kinetis Pinmux node +inherits: + !include pinmux.yaml + properties: compatible: - type: string - category: required - description: compatible strings constraint: "nxp,kinetis-pinmux" - reg: - type: int - description: mmio register space - generation: define - category: required - clocks: type: array description: clock gate information generation: define category: required -cell_string: PINMUX - "#cells": - - pin + - pins - function ... diff --git a/dts/bindings/pinctrl/pinmux.yaml b/dts/bindings/pinctrl/pinmux.yaml new file mode 100644 index 000000000000..c014a59d9122 --- /dev/null +++ b/dts/bindings/pinctrl/pinmux.yaml @@ -0,0 +1,27 @@ +--- +title: PINMUX Base structure +id: pinmux +version: 0.1 + +description: > + This binding gives the base structures for all PINMUX devices + +properties: + compatible: + type: string + category: required + description: compatible strings + reg: + type: int + description: mmio register space + generation: define + category: required + label: + type: string + category: required + description: Human readable string describing the device (used by Zephyr for API name) + generation: define + +cell_string: PINMUX + +... diff --git a/dts/bindings/pinctrl/st,stm32-pinmux.yaml b/dts/bindings/pinctrl/st,stm32-pinmux.yaml index f1e8da871421..ab99654976a1 100644 --- a/dts/bindings/pinctrl/st,stm32-pinmux.yaml +++ b/dts/bindings/pinctrl/st,stm32-pinmux.yaml @@ -6,23 +6,14 @@ version: 0.1 description: > This binding gives a base representation of the STM32 PINMUX +inherits: + !include pinmux.yaml + properties: compatible: - type: string - category: required - description: compatible strings constraint: "st,stm32-pinmux" - reg: - type: int - description: mmio register space - generation: define - category: required - -cell_string: PINMUX - "#cells": - - pin - - function + - pin,function ... diff --git a/dts/bindings/pinctrl/ti,cc2650-pinmux.yaml b/dts/bindings/pinctrl/ti,cc2650-pinmux.yaml index 8d8d5a9fb5dd..48c3bd411a8b 100644 --- a/dts/bindings/pinctrl/ti,cc2650-pinmux.yaml +++ b/dts/bindings/pinctrl/ti,cc2650-pinmux.yaml @@ -6,19 +6,13 @@ version: 0.1 description: > This is a representation of the TI CC2650 pinmux node +inherits: + !include pinmux.yaml + properties: compatible: - type: string - category: required - description: compatible strings constraint: "ti,cc2650-pinmux" - reg: - type: int - description: mmio register space - generation: define - category: required - cell_string: PINMUX "#cells": From 4d6b2b5fadef1094df6be67b71b3af120bdd19af Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 16 Nov 2017 11:31:22 +0100 Subject: [PATCH 05/10] dts: nxp: add label to pinmux nodes To enable dts based pinmux code generation, add label property to pinmux nodes on all nxp dtsi files Signed-Off-By: Erwan Gouriou --- dts/arm/nxp/nxp_k6x.dtsi | 5 +++++ dts/arm/nxp/nxp_kw2xd.dtsi | 5 +++++ dts/arm/nxp/nxp_kw40z.dtsi | 3 +++ dts/arm/nxp/nxp_kw41z.dtsi | 3 +++ 4 files changed, 16 insertions(+) diff --git a/dts/arm/nxp/nxp_k6x.dtsi b/dts/arm/nxp/nxp_k6x.dtsi index 5bfec6196d73..ad44972833af 100644 --- a/dts/arm/nxp/nxp_k6x.dtsi +++ b/dts/arm/nxp/nxp_k6x.dtsi @@ -189,12 +189,14 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; + label = "porta"; }; pinmux_b: pinmux@4004a000 { compatible = "nxp,kinetis-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; + label = "portb"; uart0_default: uart0_default { rx-tx { pins = <16>, <17>; @@ -221,18 +223,21 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; + label = "portc"; }; pinmux_d: pinmux@4004c000 { compatible = "nxp,kinetis-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; + label = "portd"; }; pinmux_e: pinmux@4004d000 { compatible = "nxp,kinetis-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; + label = "porte"; }; gpioa: gpio@400ff000 { diff --git a/dts/arm/nxp/nxp_kw2xd.dtsi b/dts/arm/nxp/nxp_kw2xd.dtsi index f30262769872..057cd0c080de 100644 --- a/dts/arm/nxp/nxp_kw2xd.dtsi +++ b/dts/arm/nxp/nxp_kw2xd.dtsi @@ -136,6 +136,7 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x40049000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; + label = "porta"; uart0_default: uart0_default { rx-tx { @@ -149,6 +150,7 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x4004a000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; + label = "portb"; spi1_default: spi1_default { miso-mosi-clk { @@ -162,12 +164,14 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x4004b000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; + label = "portc"; }; pinmux_d: pinmux@4004c000 { compatible = "nxp,kinetis-pinmux"; reg = <0x4004c000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 12>; + label = "portd"; uart2_default: uart2_default { rx-tx { @@ -181,6 +185,7 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x4004d000 0xd0>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 13>; + label = "porte"; }; gpioa: gpio@400ff000 { diff --git a/dts/arm/nxp/nxp_kw40z.dtsi b/dts/arm/nxp/nxp_kw40z.dtsi index c5b570224671..499a084213a3 100644 --- a/dts/arm/nxp/nxp_kw40z.dtsi +++ b/dts/arm/nxp/nxp_kw40z.dtsi @@ -94,6 +94,7 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x40049000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; + label = "porta"; spi1_default: spi1_default { mosi-miso-sck-pcs0 { @@ -107,12 +108,14 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x4004a000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; + label = "portb"; }; pinmux_c: pinmux@4004b000 { compatible = "nxp,kinetis-pinmux"; reg = <0x4004b000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; + label = "portc"; lpuart0_default: lpuart0_default { rx-tx { diff --git a/dts/arm/nxp/nxp_kw41z.dtsi b/dts/arm/nxp/nxp_kw41z.dtsi index 0fb081bd2fb1..110c53718696 100644 --- a/dts/arm/nxp/nxp_kw41z.dtsi +++ b/dts/arm/nxp/nxp_kw41z.dtsi @@ -94,6 +94,7 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x40049000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 9>; + label = "porta"; spi1_default: spi1_default { mosi-miso-sck-pcs0 { @@ -107,12 +108,14 @@ compatible = "nxp,kinetis-pinmux"; reg = <0x4004a000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 10>; + label = "portb"; }; pinmux_c: pinmux@4004b000 { compatible = "nxp,kinetis-pinmux"; reg = <0x4004b000 0xa4>; clocks = <&sim KINETIS_SIM_BUS_CLK 0x1038 11>; + label = "portc"; lpuart0_default: lpuart0_default { rx-tx { From bfc7d279fdd9422fdef76f1eac57b30fc5920c9f Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Wed, 22 Nov 2017 13:26:04 +0100 Subject: [PATCH 06/10] scripts: extract_dts_include: convert inherited 'id' to 'gen_type' During yaml collapse step, convert inherited 'id' key to 'gen_type'. With this new 'gen_type', it's is more easy to apply common treatment to all bindings that include the same base yaml file but might not have similar bindings/constraint naming convention. Signed-off-by: Erwan Gouriou --- scripts/dts/extract_dts_includes.py | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/scripts/dts/extract_dts_includes.py b/scripts/dts/extract_dts_includes.py index e10f54bb777e..7f7e7692e892 100755 --- a/scripts/dts/extract_dts_includes.py +++ b/scripts/dts/extract_dts_includes.py @@ -707,15 +707,20 @@ def dict_merge(dct, merge_dct): else: dct[k] = merge_dct[k] + def yaml_traverse_inherited(node): """ Recursive overload procedure inside ``node`` ``inherits`` section is searched for and used as node base when found. Base values are then overloaded by node values + Additionally, 'id' key of 'inherited' dict is converted to 'gen_type' :param node: :return: node """ if 'inherits' in node.keys(): + if 'id' in node['inherits'].keys(): + node['inherits']['gen_type'] = node['inherits']['id'] + node['inherits'].pop('id') try: yaml_traverse_inherited(node['inherits']['inherits']) except KeyError: From f3ac7ac1762651606ce8b7b1d0009bee82f98404 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 16 Nov 2017 14:01:01 +0100 Subject: [PATCH 07/10] script: exctract_dts_include: dts based pinmux generation This commits provide pinctrl initialisation code generation. A new -s option is added to the script which allows code generation in header files located in outdir//zephyr/include/generated Pinctrl generation is purely based on dts and done when soc dts provides a 'pinmux' node. The script is called with -s option by default in dts.cmake and has no effect if dts pinctrl driver generation is not prepared Signed-off-by: Erwan Gouriou --- dts/dts.cmake | 1 + scripts/dts/extract_dts_includes.py | 163 +++++++++++++++++++++++++++- 2 files changed, 160 insertions(+), 4 deletions(-) diff --git a/dts/dts.cmake b/dts/dts.cmake index ee3439a809a1..9ac952cc8d2d 100644 --- a/dts/dts.cmake +++ b/dts/dts.cmake @@ -93,6 +93,7 @@ if(CONFIG_HAS_DTS) --dts ${BOARD_FAMILY}.dts_compiled --yaml ${PROJECT_SOURCE_DIR}/dts/bindings ${DTS_BOARD_FIXUP} + -s ${PROJECT_BINARY_DIR}/include/generated ) execute_process( COMMAND ${CMD_EXTRACT_DTS_INCLUDES} diff --git a/scripts/dts/extract_dts_includes.py b/scripts/dts/extract_dts_includes.py index 7f7e7692e892..4f8745d901c4 100755 --- a/scripts/dts/extract_dts_includes.py +++ b/scripts/dts/extract_dts_includes.py @@ -21,6 +21,8 @@ reduced = {} defs = {} structs = {} +struct_dict = {} +node_file = "" def convert_string_to_label(s): @@ -113,7 +115,7 @@ def __init__(self, stream): self._root = os.path.realpath(stream.name) super(Loader, self).__init__(stream) Loader.add_constructor('!include', Loader.include) - Loader.add_constructor('!import', Loader.include) + Loader.add_constructor('!import', Loader.include) def include(self, node): if isinstance(node, yaml.ScalarNode): @@ -856,6 +858,156 @@ def lookup_defs(defs, node, key): return defs[node].get(key, None) +def print_pinctrl_init_code(node_instances, node, yaml_list, instance=""): + node_yaml_props = yaml_list[node]['properties'] + + # local variables + node_compat = convert_string_to_label(node) + + label_string = "" + + if instance != "": + label_string = "_" + instance + + write_node_file("static const struct" + ' pin_config ' + node_compat + + "_pinconf" + label_string + " [] = {\n") + + for node in structs.keys(): + if 'pinctrl' in structs[node].keys(): + node_pinctrl = structs[node]['pinctrl'] + if len(node_pinctrl['instance']) > 0: + if str(node_pinctrl['instance'][0]).strip("'") != \ + instance: + continue + + for config in range(0, len(node_pinctrl['data'])): + if 'default' in str(node_pinctrl['members'][config]): + for pin in range(0, len(node_pinctrl['data'][config])): + write_node_file("\t{") + write_node_file( + str(node_pinctrl['data'][config][pin])[1:-1]) + write_node_file("},\n") + + write_node_file("};\n\n") + + return + + +def write_node_file(str): + global file + + if file != "": + file.write(str) + else: + raise Exception("Output file does not exist.") + + +def generate_structs_file(args, yaml_list): + global file + compatible = reduced['/']['props']['compatible'][0] + + if not args.structs: + print('Usage: %s -d filename.dts -y path_to_yaml -s $(objtree)' % + sys.argv[0]) + return 1 + + # print driver code init + for node in struct_dict: + + #Look for node with 'pinmux' type + try: + if yaml_list[node]['gen_type'] != 'pinmux': + continue + except KeyError: + continue + + outdir_path = str(args.structs) + node_file_path = str(outdir_path) + node_file = node_file_path + '/' + convert_string_to_label( + node) + '_init.h' + + if not os.path.exists(os.path.dirname(node_file)): + try: + os.makedirs(os.path.dirname(node_file)) + except: + raise Exception( + "Could not find path: " + str(node_file_path)) + + try: + file = open(node_file, 'w') + except: + raise Exception("Could not open file: " + node_file) + + write_node_file("/**************************************************\n") + write_node_file(" * Generated include file for " + node) + write_node_file("\n") + write_node_file(" * DO NOT MODIFY\n"); + write_node_file(" */\n") + write_node_file("\n") + write_node_file("#ifndef " + str( + convert_string_to_label(node) + '_init').upper() + "_H" + "\n"); + write_node_file("#define _" + str( + convert_string_to_label(node) + '_init').upper() + "_H" + "\n"); + write_node_file("\n") + + # check if multiple instances of pinmux/pinctrl IP + if len(struct_dict[node]) > 1: + i = 0 + pinmux_table = [] + + for instance in (struct_dict[node]): + + # build the array of used pinmuxes + for node_1 in structs.keys(): + #For each node in structs, check it has a pinctrl prop + if 'pinctrl' in structs[node_1].keys(): + pinmux_label = str( + structs[node_1]['pinctrl']['instance'][ + 0]).strip("'") + #check if pinctrl instance is same as current one + # if pinmux_label == str( + # struct_dict[node][i]['label']['data'][0][ + # 0]).strip('"'): + if pinmux_label not in pinmux_table: + pinmux_table.append(pinmux_label) + i = i + 1 + + # write pinmux array for this instance + for line in range(0, len(pinmux_table)): + print_pinctrl_init_code(struct_dict[node], node, yaml_list, + pinmux_table[line]) + + # write the array of used pinmuxes + write_node_file( + "static struct instances_pinconfig " + str(convert_string_to_label( + node)) + "_instances" + " [] = {") + + for line in range(0, len(pinmux_table)): + write_node_file("\n\t{\"" + str(pinmux_table[line]) + "\", ") + write_node_file( + str(convert_string_to_label(node)) + "_pinconf_" + str( + pinmux_table[line]) + ", ") + write_node_file("ARRAY_SIZE(" + + str(convert_string_to_label(node)) + "_pinconf_" + str( + pinmux_table[line]) + ")") + write_node_file("},") + write_node_file("\n};\n\n") + + else: + # check if there is a label associated + if 'label' in struct_dict[node][0]: + pinmux_label = str( + struct_dict[node][0]['label']['data'][0][0]).strip('"') + print_pinctrl_init_code(struct_dict[node], node, yaml_list, + pinmux_label) + else: + print_pinctrl_init_code(struct_dict[node], node, yaml_list) + + write_node_file("#endif /* _" + str( + convert_string_to_label(node) + '_init').upper() + "_H */" + "\n"); + node_file = "" + file.close() + def generate_structs(args): # Generate structure information here @@ -890,6 +1042,7 @@ def generate_structs(args): # pprint.pprint(struct_dict) return + def parse_arguments(): rdh = argparse.RawDescriptionHelpFormatter @@ -897,6 +1050,7 @@ def parse_arguments(): parser.add_argument("-d", "--dts", help="DTS file") parser.add_argument("-y", "--yaml", help="YAML file") + parser.add_argument("-s", "--structs", help="objdir path") parser.add_argument("-f", "--fixup", action="append", help="Fixup file, we allow multiple") parser.add_argument("-k", "--keyvalue", action="store_true", @@ -1030,16 +1184,17 @@ def main(): insert_defs(chosen['zephyr,flash'], load_defs, {}) - # pprint.pprint(defs) - # pprint.pprint(structs) # generate include file if args.keyvalue: generate_keyvalue_file(args) + generate_structs_file(args, yaml_list) elif args.structs: generate_structs(args) + generate_include_file(args) + generate_structs_file(args, yaml_list) else: generate_include_file(args) - + # generate_structs_file(args, yaml_list) if __name__ == '__main__': main() From 583ec4aae96cac944c659b169bff0a1cc788cd1e Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 16 Nov 2017 14:12:10 +0100 Subject: [PATCH 08/10] board: disco_l475_iot1: use generated pinmux for I2C and UART Include generated file st_stm32_pinmux_init.h in board pinmux.c. Generated file provides st_stm32_pinmux_pinconf array. This array holds pinmux information for UART and I2C. It is parsed to configure and initialize pins configured in board dts. Signed-Off-By: Erwan Gouriou --- boards/arm/disco_l475_iot1/pinmux.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/boards/arm/disco_l475_iot1/pinmux.c b/boards/arm/disco_l475_iot1/pinmux.c index ba061d617280..6920a4d140e8 100644 --- a/boards/arm/disco_l475_iot1/pinmux.c +++ b/boards/arm/disco_l475_iot1/pinmux.c @@ -12,21 +12,11 @@ #include +/* Include pinmux configuration generated file */ +#include + /* pin assignments for Disco L475 IOT1 board */ static const struct pin_config pinconf[] = { -#ifdef CONFIG_UART_STM32_PORT_1 - {STM32_PIN_PB6, STM32L4X_PINMUX_FUNC_PB6_USART1_TX}, - {STM32_PIN_PB7, STM32L4X_PINMUX_FUNC_PB7_USART1_RX}, -#endif /* CONFIG_UART_STM32_PORT_1 */ -#ifdef CONFIG_I2C_1 - {STM32_PIN_PB8, STM32L4X_PINMUX_FUNC_PB8_I2C1_SCL}, - {STM32_PIN_PB9, STM32L4X_PINMUX_FUNC_PB9_I2C1_SDA}, -#endif /* CONFIG_I2C_1 */ -#ifdef CONFIG_I2C_2 - /* I2C2 is used for NFC, STSAFE, ToF & MEMS sensors */ - {STM32_PIN_PB10, STM32L4X_PINMUX_FUNC_PB10_I2C2_SCL}, - {STM32_PIN_PB11, STM32L4X_PINMUX_FUNC_PB11_I2C2_SDA}, -#endif /* CONFIG_I2C_2 */ #ifdef CONFIG_SPI_1 {STM32_PIN_PA5, STM32L4X_PINMUX_FUNC_PA5_SPI1_SCK}, {STM32_PIN_PA6, STM32L4X_PINMUX_FUNC_PA6_SPI1_MISO}, @@ -54,8 +44,14 @@ static int pinmux_stm32_init(struct device *port) { ARG_UNUSED(port); + /* Parse pinconf array provided above */ stm32_setup_pins(pinconf, ARRAY_SIZE(pinconf)); + /* Parse st_stm32_pinmux_pinconf array provided */ + /* in dts based generated file st_stm32_pinmux_init.h */ + stm32_setup_pins(st_stm32_pinmux_pinconf, + ARRAY_SIZE(st_stm32_pinmux_pinconf)); + return 0; } From dcbf92c61f08ad05282245daaee9e56f57a372b3 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Thu, 30 Nov 2017 17:22:49 +0100 Subject: [PATCH 09/10] board: frdm_k64f: use generated pinmux for UART Include generated file nxp_kinetis_pinmux_init.h in board pinmux.c. Generated file provides nxp_kinetis_pinmux_instances array. This array holds pinmux instances information for UART. It is parsed to configure and initialize pins configured in board dts. Signed-off-by: Erwan Gouriou --- boards/arm/frdm_k64f/pinmux.c | 38 ++++++++++++++++++++++++++----- boards/arm/frdm_k64f/pinmux_nxp.h | 18 +++++++++++++++ 2 files changed, 50 insertions(+), 6 deletions(-) create mode 100644 boards/arm/frdm_k64f/pinmux_nxp.h diff --git a/boards/arm/frdm_k64f/pinmux.c b/boards/arm/frdm_k64f/pinmux.c index 2dc1826b8aaa..702b9617d54c 100644 --- a/boards/arm/frdm_k64f/pinmux.c +++ b/boards/arm/frdm_k64f/pinmux.c @@ -8,10 +8,18 @@ #include #include +#include "pinmux/pinmux.h" +#include "pinmux_nxp.h" + +/* Include pinmux configuration generated file */ +#include + static int frdm_k64f_pinmux_init(struct device *dev) { ARG_UNUSED(dev); + struct device *port; + #ifdef CONFIG_PINMUX_MCUX_PORTA struct device *porta = device_get_binding(CONFIG_PINMUX_MCUX_PORTA_NAME); @@ -33,12 +41,6 @@ static int frdm_k64f_pinmux_init(struct device *dev) device_get_binding(CONFIG_PINMUX_MCUX_PORTE_NAME); #endif -#ifdef CONFIG_UART_MCUX_0 - /* UART0 RX, TX */ - pinmux_pin_set(portb, 16, PORT_PCR_MUX(kPORT_MuxAlt3)); - pinmux_pin_set(portb, 17, PORT_PCR_MUX(kPORT_MuxAlt3)); -#endif - #ifdef CONFIG_UART_MCUX_3 /* UART3 RX, TX */ pinmux_pin_set(portc, 16, PORT_PCR_MUX(kPORT_MuxAlt3)); @@ -112,6 +114,30 @@ static int frdm_k64f_pinmux_init(struct device *dev) pinmux_pin_set(portc, 19, PORT_PCR_MUX(kPORT_MuxAlt4)); #endif + + /* Parse nxp_kinetis_pinmux_instances array provided */ + /* in dts based generated file nxp_kinetis_pinmux_instances.h */ + /* Array holds instances_pinconfig structures which contain */ + /* pin configuration for each pinmux instance */ + for (int i = 0; i < ARRAY_SIZE(nxp_kinetis_pinmux_instances); i++) { + + int size = nxp_kinetis_pinmux_instances[i].instance_npins; + const struct pin_config *pinconf = + nxp_kinetis_pinmux_instances[i].instance_pins; + + /* For each pinmux instance, get device binding */ + /* and set each pin individually */ + + port = + device_get_binding(nxp_kinetis_pinmux_instances[i].instance); + + for (int p = 0; p < size; p++) { + pinmux_pin_set(port, + pinconf[p].pin_num, + pinconf[p].mode); + } + } + return 0; } diff --git a/boards/arm/frdm_k64f/pinmux_nxp.h b/boards/arm/frdm_k64f/pinmux_nxp.h new file mode 100644 index 000000000000..781a7b46906c --- /dev/null +++ b/boards/arm/frdm_k64f/pinmux_nxp.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2017 Linaro Limited. + * + * SPDX-License-Identifier: Apache-2.0 + */ + + #ifndef PINMUX_H + #define PINMUX_H + +/* Struct used to hold pinmux instances configuration */ +struct instances_pinconfig { + char *instance; + const struct pin_config *instance_pins; + size_t instance_npins; +}; + + +#endif /* PINMUX_H */ From bd813a73b07f14aee83ed86da4a066e679b0ebad Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Tue, 5 Dec 2017 15:49:37 +0100 Subject: [PATCH 10/10] dts: nxp: inctroduce pinctrl binding In order to be able to configure pin control registers using device tree properties, introduce a pinctrl binding providing defines compatible with current use of pinmux_pin_set function. Provided set of defines is equivalent to PORT_PCR_xxx set provided in nxp hal. Signed-off-by: Erwan Gouriou --- dts/arm/nxp/nxp_k6x.dtsi | 7 +- dts/arm/nxp/nxp_kl25z.dtsi | 1 + dts/arm/nxp/nxp_kw2xd.dtsi | 7 +- dts/arm/nxp/nxp_kw40z.dtsi | 11 +-- dts/arm/nxp/nxp_kw41z.dtsi | 11 +-- dts/arm/nxp/nxp_rt.dtsi | 1 + include/dt-bindings/pinctrl/mcux-pinctrl.h | 80 ++++++++++++++++++++++ 7 files changed, 102 insertions(+), 16 deletions(-) create mode 100644 include/dt-bindings/pinctrl/mcux-pinctrl.h diff --git a/dts/arm/nxp/nxp_k6x.dtsi b/dts/arm/nxp/nxp_k6x.dtsi index ad44972833af..b0defa5b8030 100644 --- a/dts/arm/nxp/nxp_k6x.dtsi +++ b/dts/arm/nxp/nxp_k6x.dtsi @@ -1,6 +1,7 @@ #include #include #include +#include / { cpus { @@ -200,21 +201,21 @@ uart0_default: uart0_default { rx-tx { pins = <16>, <17>; - function = <3>; + function = ; }; }; uart0_lpm: uart0_lpm { rx-tx { pins = <16>, <17>; - function = <0>; + function = ; }; }; spi0_default: spi0_default { miso-mosi-clk { pins = <10>, <9>; - function = <2>; + function = ; }; }; }; diff --git a/dts/arm/nxp/nxp_kl25z.dtsi b/dts/arm/nxp/nxp_kl25z.dtsi index 0f0f47dafeaf..239940ebbfed 100644 --- a/dts/arm/nxp/nxp_kl25z.dtsi +++ b/dts/arm/nxp/nxp_kl25z.dtsi @@ -1,6 +1,7 @@ #include "armv6-m.dtsi" #include #include +#include / { cpus { diff --git a/dts/arm/nxp/nxp_kw2xd.dtsi b/dts/arm/nxp/nxp_kw2xd.dtsi index 057cd0c080de..2d7fb5d4a9f8 100644 --- a/dts/arm/nxp/nxp_kw2xd.dtsi +++ b/dts/arm/nxp/nxp_kw2xd.dtsi @@ -1,6 +1,7 @@ #include #include #include +#include / { cpus { @@ -141,7 +142,7 @@ uart0_default: uart0_default { rx-tx { pins = <1>, <2>; - function = <2>; + function = ; }; }; }; @@ -155,7 +156,7 @@ spi1_default: spi1_default { miso-mosi-clk { pins = <17>, <16>, <11>; - function = <2>; + function = ; }; }; }; @@ -176,7 +177,7 @@ uart2_default: uart2_default { rx-tx { pins = <2>, <3>; - function = <3>; + function = ; }; }; }; diff --git a/dts/arm/nxp/nxp_kw40z.dtsi b/dts/arm/nxp/nxp_kw40z.dtsi index 499a084213a3..6b520fd4337c 100644 --- a/dts/arm/nxp/nxp_kw40z.dtsi +++ b/dts/arm/nxp/nxp_kw40z.dtsi @@ -1,6 +1,7 @@ #include "armv6-m.dtsi" #include #include +#include / { cpus { @@ -99,7 +100,7 @@ spi1_default: spi1_default { mosi-miso-sck-pcs0 { pins = <16>, <17>, <18>, <19>; - function = <2>; + function = ; }; }; }; @@ -120,28 +121,28 @@ lpuart0_default: lpuart0_default { rx-tx { pins = <6>, <7>; - function = <4>; + function = ; }; }; lpuart0_alt1: lpuart0_alt1 { rx-tx { pins = <17>, <18>; - function = <4>; + function = ; }; }; lpuart0_alt2: lpuart0_alt2 { rx-tx-cts-rts { pins = <2>, <3>, <0>, <1>; - function = <4>; + function = ; }; }; spi0_default: spi0_default { mosi-miso-clk-pcs0 { pins = <18>, <17>, <16>, <19>; - function = <2>; + function = ; }; }; }; diff --git a/dts/arm/nxp/nxp_kw41z.dtsi b/dts/arm/nxp/nxp_kw41z.dtsi index 110c53718696..a721b6892f52 100644 --- a/dts/arm/nxp/nxp_kw41z.dtsi +++ b/dts/arm/nxp/nxp_kw41z.dtsi @@ -1,6 +1,7 @@ #include #include #include +#include / { cpus { @@ -99,7 +100,7 @@ spi1_default: spi1_default { mosi-miso-sck-pcs0 { pins = <16>, <17>, <18>, <19>; - function = <2>; + function = ; }; }; }; @@ -120,28 +121,28 @@ lpuart0_default: lpuart0_default { rx-tx { pins = <6>, <7>; - function = <4>; + function = ; }; }; lpuart0_alt1: lpuart0_alt1 { rx-tx { pins = <17>, <18>; - function = <4>; + function = ; }; }; lpuart0_alt2: lpuart0_alt2 { rx-tx-cts-rts { pins = <2>, <3>, <0>, <1>; - function = <4>; + function = ; }; }; spi0_default: spi0_default { mosi-miso-clk-pcs0 { pins = <18>, <17>, <16>, <19>; - function = <2>; + function = ; }; }; }; diff --git a/dts/arm/nxp/nxp_rt.dtsi b/dts/arm/nxp/nxp_rt.dtsi index 4ea999b3ff78..9e70ca7f4477 100644 --- a/dts/arm/nxp/nxp_rt.dtsi +++ b/dts/arm/nxp/nxp_rt.dtsi @@ -6,6 +6,7 @@ #include #include +#include / { cpus { diff --git a/include/dt-bindings/pinctrl/mcux-pinctrl.h b/include/dt-bindings/pinctrl/mcux-pinctrl.h new file mode 100644 index 000000000000..89e6247d6a79 --- /dev/null +++ b/include/dt-bindings/pinctrl/mcux-pinctrl.h @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2017 Linaro Limited + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef _MCUX_PINCTRL_H_ +#define _MCUX_PINCTRL_H_ + + +/*! @name PCR - Pin Control Register n */ +#define PORT_PCR_PS_MASK (0x1U) +#define PORT_PCR_PS_SHIFT (0U) +#define PORT_PCR_PS(x) ((x << PORT_PCR_PS_SHIFT) & PORT_PCR_PS_MASK) +#define PORT_PCR_PE_MASK (0x2U) +#define PORT_PCR_PE_SHIFT (1U) +#define PORT_PCR_PE(x) ((x << PORT_PCR_PE_SHIFT) & PORT_PCR_PE_MASK) +#define PORT_PCR_SRE_MASK (0x4U) +#define PORT_PCR_SRE_SHIFT (2U) +#define PORT_PCR_SRE(x) ((x << PORT_PCR_SRE_SHIFT) & PORT_PCR_SRE_MASK) +#define PORT_PCR_PFE_MASK (0x10U) +#define PORT_PCR_PFE_SHIFT (4U) +#define PORT_PCR_PFE(x) ((x << PORT_PCR_PFE_SHIFT) & PORT_PCR_PFE_MASK) +#define PORT_PCR_ODE_MASK (0x20U) +#define PORT_PCR_ODE_SHIFT (5U) +#define PORT_PCR_ODE(x) ((x << PORT_PCR_ODE_SHIFT) & PORT_PCR_ODE_MASK) +#define PORT_PCR_DSE_MASK (0x40U) +#define PORT_PCR_DSE_SHIFT (6U) +#define PORT_PCR_DSE(x) ((x << PORT_PCR_DSE_SHIFT) & PORT_PCR_DSE_MASK) +#define PORT_PCR_MUX_MASK (0x700U) +#define PORT_PCR_MUX_SHIFT (8U) +#define PORT_PCR_MUX(x) ((x << PORT_PCR_MUX_SHIFT) & PORT_PCR_MUX_MASK) +#define PORT_PCR_LK_MASK (0x8000U) +#define PORT_PCR_LK_SHIFT (15U) +#define PORT_PCR_LK(x) ((x << PORT_PCR_LK_SHIFT) & PORT_PCR_LK_MASK) +#define PORT_PCR_IRQC_MASK (0xF0000U) +#define PORT_PCR_IRQC_SHIFT (16U) +#define PORT_PCR_IRQC(x) ((x << PORT_PCR_IRQC_SHIFT) & PORT_PCR_IRQC_MASK) +#define PORT_PCR_ISF_MASK (0x1000000U) +#define PORT_PCR_ISF_SHIFT (24U) +#define PORT_PCR_ISF(x) ((x << PORT_PCR_ISF_SHIFT) & PORT_PCR_ISF_MASK) + +/* Alternate functions */ +#define FUNC_ALT_0 0 +#define FUNC_ALT_1 1 +#define FUNC_ALT_2 2 +#define FUNC_ALT_3 3 +#define FUNC_ALT_4 4 +#define FUNC_ALT_5 5 +#define FUNC_ALT_6 6 +#define FUNC_ALT_7 7 +#define FUNC_ALT_8 8 +#define FUNC_ALT_9 9 +#define FUNC_ALT_10 10 +#define FUNC_ALT_11 11 +#define FUNC_ALT_12 12 +#define FUNC_ALT_13 13 +#define FUNC_ALT_14 14 +#define FUNC_ALT_15 15 + +/* Alternate functions */ +#define MCUX_FUNC_ALT_0 PORT_PCR_MUX(FUNC_ALT_0) +#define MCUX_FUNC_ALT_1 PORT_PCR_MUX(FUNC_ALT_1) +#define MCUX_FUNC_ALT_2 PORT_PCR_MUX(FUNC_ALT_2) +#define MCUX_FUNC_ALT_3 PORT_PCR_MUX(FUNC_ALT_3) +#define MCUX_FUNC_ALT_4 PORT_PCR_MUX(FUNC_ALT_4) +#define MCUX_FUNC_ALT_5 PORT_PCR_MUX(FUNC_ALT_5) +#define MCUX_FUNC_ALT_6 PORT_PCR_MUX(FUNC_ALT_6) +#define MCUX_FUNC_ALT_7 PORT_PCR_MUX(FUNC_ALT_7) +#define MCUX_FUNC_ALT_8 PORT_PCR_MUX(FUNC_ALT_8) +#define MCUX_FUNC_ALT_9 PORT_PCR_MUX(FUNC_ALT_9) +#define MCUX_FUNC_ALT_10 PORT_PCR_MUX(FUNC_ALT_10) +#define MCUX_FUNC_ALT_11 PORT_PCR_MUX(FUNC_ALT_11) +#define MCUX_FUNC_ALT_12 PORT_PCR_MUX(FUNC_ALT_12) +#define MCUX_FUNC_ALT_13 PORT_PCR_MUX(FUNC_ALT_13) +#define MCUX_FUNC_ALT_14 PORT_PCR_MUX(FUNC_ALT_14) +#define MCUX_FUNC_ALT_15 PORT_PCR_MUX(FUNC_ALT_15) + + +#endif /* _MCUX_PINCTRL_H_ */