diff --git a/boards/phytec/phyboard_electra/phyboard_electra_am6442_m4.dts b/boards/phytec/phyboard_electra/phyboard_electra_am6442_m4.dts index cc243d6243c5..55a26e55b0f1 100644 --- a/boards/phytec/phyboard_electra/phyboard_electra_am6442_m4.dts +++ b/boards/phytec/phyboard_electra/phyboard_electra_am6442_m4.dts @@ -7,6 +7,8 @@ /dts-v1/; +#include +#include #include / { @@ -15,8 +17,8 @@ chosen { zephyr,sram = &sram0; - zephyr,console = &uart0; - zephyr,shell-uart = &uart0; + zephyr,console = &mcu_uart0; + zephyr,shell-uart = &mcu_uart0; zephyr,ipc_shm = &ddr0; zephyr,sram1 = &ddr1; }; @@ -52,13 +54,15 @@ leds: leds { compatible = "gpio-leds"; heartbeat_led: led_0 { - gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; + gpios = <&mcu_gpio0 6 GPIO_ACTIVE_HIGH>; label = "Heartbeat LED"; }; }; }; -&pinctrl { +&mcu_pinctrl { + status = "okay"; + mcu_uart0_rx_default: mcu_uart0_rx_default { pinmux = ; }; @@ -70,14 +74,14 @@ }; }; -&uart0 { +&mcu_uart0 { current-speed = <115200>; pinctrl-0 = <&mcu_uart0_rx_default &mcu_uart0_tx_default>; pinctrl-names = "default"; status = "okay"; }; -&gpio0 { +&mcu_gpio0 { pinctrl-0 = <&mcu_gpio0_led_default>; pinctrl-names = "default"; status = "okay"; diff --git a/boards/ti/am243x_evm/Kconfig.am243x_evm b/boards/ti/am243x_evm/Kconfig.am243x_evm new file mode 100644 index 000000000000..66dd507d3a86 --- /dev/null +++ b/boards/ti/am243x_evm/Kconfig.am243x_evm @@ -0,0 +1,9 @@ +# Texas Instruments Sitara AM243x EVM +# +# Copyright (c) 2025 Texas Instruments Incorporated +# +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_AM243X_EVM + select SOC_AM2434_M4 if BOARD_AM243X_EVM_AM2434_M4 + select SOC_AM2434_R5F0_0 if BOARD_AM243X_EVM_AM2434_R5F0_0 diff --git a/boards/ti/am243x_evm/am243x_evm_am2434_m4-pinctrl.dtsi b/boards/ti/am243x_evm/am243x_evm_am2434_m4-pinctrl.dtsi new file mode 100644 index 000000000000..529d6da2c226 --- /dev/null +++ b/boards/ti/am243x_evm/am243x_evm_am2434_m4-pinctrl.dtsi @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2025 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&mcu_pinctrl { + status = "okay"; + + mcu_uart0_rx: mcu_uart0_rx_default { + pinmux = ; + }; + + mcu_uart0_tx: mcu_uart0_tx_default { + pinmux = ; + }; + + mcu_gpio0_led: mcu_gpio0_led_default { + pinmux = ; + }; +}; diff --git a/boards/ti/am243x_evm/am243x_evm_am2434_m4.dts b/boards/ti/am243x_evm/am243x_evm_am2434_m4.dts new file mode 100644 index 000000000000..fdc352252f81 --- /dev/null +++ b/boards/ti/am243x_evm/am243x_evm_am2434_m4.dts @@ -0,0 +1,79 @@ +/* + * Copyright (c) 2025 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include "am243x_evm_am2434_m4-pinctrl.dtsi" + +/ { + model = "TI AM243x EVM M4 core"; + compatible = "ti,am243x-evm-m4"; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &mcu_uart0; + zephyr,shell-uart = &mcu_uart0; + zephyr,ipc = &ipc0; + zephyr,ipc-shm = &ipc_shm0; + }; + + aliases { + led0 = &ld26; + }; + + cpus { + cpu@0 { + status = "okay"; + clock-frequency = ; + }; + }; + + leds: leds { + compatible = "gpio-leds"; + + ld26: led_0 { + gpios = <&mcu_gpio0 5 GPIO_ACTIVE_HIGH>; + }; + }; + + rsc_table: memory@a4100000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0xa4100000 DT_SIZE_K(4)>; + zephyr,memory-region = "RSC_TABLE"; + }; + + ipc_shm0: memory@a5000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0xa5000000 DT_SIZE_M(8)>; + zephyr,memory-region = "IPC_SHM"; + }; + + ipc0: ipc { + compatible = "zephyr,mbox-ipm"; + mboxes = <&mbox6 0>, <&mbox6 1>; + mbox-names = "tx", "rx"; + }; +}; + +&mcu_uart0 { + current-speed = <115200>; + pinctrl-0 = <&mcu_uart0_rx &mcu_uart0_tx>; + pinctrl-names = "default"; + status = "okay"; +}; + +&mcu_gpio0 { + pinctrl-0 = <&mcu_gpio0_led>; + pinctrl-names = "default"; + status = "okay"; +}; + +&mbox6 { + usr-id = <3>; + status = "okay"; +}; diff --git a/boards/ti/am243x_evm/am243x_evm_am2434_m4.yaml b/boards/ti/am243x_evm/am243x_evm_am2434_m4.yaml new file mode 100644 index 000000000000..dfa92ab5717d --- /dev/null +++ b/boards/ti/am243x_evm/am243x_evm_am2434_m4.yaml @@ -0,0 +1,12 @@ +# Copyright (c) 2025 Texas Instruments Incorporated +# +# SPDX-License-Identifier: Apache-2.0 + +identifier: am243x_evm/am2434/m4 +name: TI AM243x M4 +type: mcu +arch: arm +toolchain: + - zephyr +ram: 192 +vendor: ti diff --git a/boards/ti/am243x_evm/am243x_evm_am2434_m4_defconfig b/boards/ti/am243x_evm/am243x_evm_am2434_m4_defconfig new file mode 100644 index 000000000000..a7dd44ae00c6 --- /dev/null +++ b/boards/ti/am243x_evm/am243x_evm_am2434_m4_defconfig @@ -0,0 +1,16 @@ +# Copyright (c) 2025 Texas Instruments Incorporated +# +# SPDX-License-Identifier: Apache-2.0 + +# Platform Configuration +CONFIG_CORTEX_M_SYSTICK=y + +# Zephyr Kernel Configuration +CONFIG_XIP=n + +# Serial Driver +CONFIG_SERIAL=y + +# Enable Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y diff --git a/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0-pinctrl.dtsi b/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0-pinctrl.dtsi new file mode 100644 index 000000000000..08c5e112da6e --- /dev/null +++ b/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0-pinctrl.dtsi @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2025 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&pinctrl { + status = "okay"; + + uart0_rx: uart0_rx_default { + pinmux = ; + }; + + uart0_tx: uart0_tx_default { + pinmux = ; + }; + + i2c0_scl: i2c0_scl_default { + pinmux = ; + }; + + i2c0_sda: i2c0_sda_default { + pinmux = ; + }; +}; + +&mcu_pinctrl { + status = "okay"; + + mcu_gpio0_led: mcu_gpio0_led_default { + pinmux = ; + }; +}; diff --git a/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0.dts b/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0.dts new file mode 100644 index 000000000000..3b48ca090907 --- /dev/null +++ b/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0.dts @@ -0,0 +1,85 @@ +/* Copyright (c) 2025 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; + +#include +#include +#include "am243x_evm_am2434_r5f0_0-pinctrl.dtsi" + +/ { + model = "TI AM243x EVM R50 Core 0"; + compatible = "ti,am243x-evm-r5"; + + chosen { + zephyr,sram = &sram; + zephyr,sram1 = &atcm; + zephyr,console = &uart0; + zephyr,shell-uart = &uart0; + zephyr,ipc = &ipc0; + zephyr,ipc-shm = &ipc_shm0; + }; + + aliases { + led0 = &ld26; + }; + + leds: leds { + compatible = "gpio-leds"; + + ld26: led_0 { + gpios = <&mcu_gpio0 5 GPIO_ACTIVE_HIGH>; + }; + }; + + rsc_table: memory@a0100000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0xa0100000 DT_SIZE_K(4)>; + zephyr,memory-region = "RSC_TABLE"; + zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; + }; + + ipc_shm0: memory@a5000000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0xa5000000 DT_SIZE_M(8)>; + zephyr,memory-region = "IPC_SHM"; + zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>; + }; + + ipc0: ipc { + compatible = "zephyr,mbox-ipm"; + mboxes = <&mbox6 0>, <&mbox6 1>; + mbox-names = "rx", "tx"; + }; +}; + +/* system timer */ +&timer8 { + status = "okay"; +}; + +&uart0 { + status = "okay"; + pinctrl-0 = <&uart0_tx &uart0_rx>; + pinctrl-names = "default"; + current-speed = <115200>; +}; + +&mcu_gpio0 { + pinctrl-0 = <&mcu_gpio0_led>; + pinctrl-names = "default"; + status = "okay"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_scl &i2c0_sda>; + pinctrl-names = "default"; + status = "okay"; +}; + +&mbox6 { + usr-id = <0>; + status = "okay"; +}; diff --git a/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0.yaml b/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0.yaml new file mode 100644 index 000000000000..11fe527a8e82 --- /dev/null +++ b/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0.yaml @@ -0,0 +1,13 @@ +# Copyright (c) 2025 Texas Instruments Incorporated +# +# SPDX-License-Identifier: Apache-2.0 + +identifier: am243x_evm/am2434/r5f0_0 +name: AM243x R5 Core +type: mcu +arch: arm +ram: 256 +toolchain: + - zephyr + - gnuarmemb +vendor: ti diff --git a/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0_defconfig b/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0_defconfig new file mode 100644 index 000000000000..1b60b680f7a0 --- /dev/null +++ b/boards/ti/am243x_evm/am243x_evm_am2434_r5f0_0_defconfig @@ -0,0 +1,17 @@ +# Copyright (c) 2025 Texas Instruments Incorporated +# +# SPDX-License-Identifier: Apache-2.0 + +# Zephyr Kernel Configuration +CONFIG_XIP=n + +# Serial Driver +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Enable Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable MPU +CONFIG_ARM_MPU=y diff --git a/boards/ti/am243x_evm/board.yml b/boards/ti/am243x_evm/board.yml new file mode 100644 index 000000000000..f9162ef68245 --- /dev/null +++ b/boards/ti/am243x_evm/board.yml @@ -0,0 +1,6 @@ +board: + name: am243x_evm + full_name: TI AM243x-EVM + vendor: ti + socs: + - name: am2434 diff --git a/boards/ti/am243x_evm/doc/img/tmds243evm-angled.webp b/boards/ti/am243x_evm/doc/img/tmds243evm-angled.webp new file mode 100644 index 000000000000..87e99a11039d Binary files /dev/null and b/boards/ti/am243x_evm/doc/img/tmds243evm-angled.webp differ diff --git a/boards/ti/am243x_evm/doc/index.rst b/boards/ti/am243x_evm/doc/index.rst new file mode 100644 index 000000000000..9689e094f9c6 --- /dev/null +++ b/boards/ti/am243x_evm/doc/index.rst @@ -0,0 +1,280 @@ +.. zephyr:board:: am243x_evm + +Overview +******** + +The AM243x EVM is a development board that is based of a AM2434 SoC. The +Cortex R5F cores in the SoC run at 800 MHz. The board also includes a flash +region, DIP-Switches for the boot mode selection and 2 RJ45 Ethernet ports. + +See the `TI TMDS243EVM Product Page`_ for details. + +Hardware +******** + +The AM2434 SoC has 2 domains. A MAIN domain and a MCU domain. The MAIN domain +consists of 4 R5F cores and the MCU domain of one M4F core. + +Zephyr currently supports the following cores: + +- R5F Subsystem 0 Core 0 (R5F0_0) +- M4F Core (M4) + +The board physically contains: + +- Memory. + + - 256KB of SRAM + - 2GB of DDR4 + +- Debug + + - XDS110 based JTAG + +Devices +======== +System Clock +------------ + +This board configuration uses a system clock frequency of + +- 800MHz for R5F0_0 +- 400MHz for M4 + +DDR RAM +------- + +The board has 2GB of DDR RAM available. This board configuration allocates: + +- 4KB Resource Table at 0xa4100000 for M4 +- 4KB Resource Table at 0xa0100000 for R5F0_0 +- 8MB Shared Memory at 0xa5000000 for inter-processor communication + +Serial Port +----------- + +This board configuration uses by default: + +- MAIN domain UART (UART0) for R5F0_0 +- MCU domain UART (MCU_UART0) for M4 + +Supported Features +================== + +.. zephyr:board-supported-hw:: + + +Flashing +******** +The boot process of the AM2434 SoC requires the booting image to be in a +specific format and to wait for the internal DMSC-L of the AM2434 to start up +and configure memory firewalls. Since there exists no Zephyr support it's +required to use one of the SBL bootloader examples from the TI MCU+ SDK. + + +Prerequisites +============= + +The following steps are from the time this documentation was written and might +change in the future. They also target Linux with assumption some basic things +(like python3 and openssl) are installed. + +You might also want to take a look at the `Bootflow Guide`_ for more details. + +To build these you need to install the TI MCU+ SDK. To do this you need to +follow the steps described in the ``mcupsdk-core`` repository, which includes +cloning the repositories with west. It's recommended to use another Python venv +for this since the MCU+ SDK has own Python dependencies that could conflict with +Zephyr dependencies. You can replace ``all/dev.yml`` in the ``west init`` +command with ``am243x/dev.yml``, if you want to clone a few less repositories. + +You also need to follow the "Downloading And Installing Dependencies" section +but you need to replace all ``am263x`` occurences in commands with ``am243x``. +Please also take note of the ``tools`` and ``mcu_plus_sdk`` install path. The +``tools`` install path will later be referred to as ``$TI_TOOLS`` and the MCU+ +SDK path as ``$MCUPSDK``. You can pass ``--skip_doxygen=true`` and +``--skip_ccs=true`` to the install script since they aren't needed. You might +encounter a error that a script can't be executed. To fix it you need to mark it +as executable with ``chmod +x `` and run the ``download_components.sh`` +again. + +Summarized you will most likely want to run the following commands or similar +versions for setting up the MCU+ SDK: + +.. code-block:: console + + python3 -m venv .venv + source .venv/bin/activate + pip3 install west + west init -m https://github.com/TexasInstruments/mcupsdk-manifests.git --mr mcupsdk_west --mf am243x/dev.yml + west update + ./mcupsdk_setup/am243x/download_components.sh --skip_doxygen=true --skip_ccs=true + +After the script finished successfully you want to switch into the +``mcu_plus_sdk`` directory and edit the +``source/drivers/bootloader/bootloader.c`` file to set the ``entryPoint`` to +``0`` inside ``Bootloader_runCpu`` unconditionally. This is needed due to how +Zephyr builds the image currently. + +Now you can build the internal libraries with the following commands: + +.. code-block:: console + + make gen-buildfiles DEVICE=am243x PROFILE=release + make libs DEVICE=am243x PROFILE=release + +If you encounter compile errors you have to fix them. For that you might have to +change parameter types, remove missing source files from makefiles or download +missing headers from the TI online reference. + +Depending on whether you later want to boot from flash or by loading the image +via UART either the ``sbl_ospi`` or the ``sbl_uart`` example is relevant for the +next section. + + +Building the bootloader itself +============================== + +The example bootloader implementation is found in the +``examples/drivers/boot//am243x-evm/r5fss0-0_nortos`` directory. + +You can either build the example by invoking ``make -C +examples/drivers/boot//am243x-evm/r5fss0-0_nortos/ti-arm-clang/ +DEVICE=am243x PROFILE=release`` or use the prebuilt binaries in +``tools/boot/sbl_prebuilt/am243x-evm`` + + +Converting the Zephyr application +================================= + +Additionally for booting you need to convert your built Zephyr binary into a +format that the TI example bootloader can boot. You can do this with the +following commands, where ``$TI_TOOLS`` refers to the root of where your +ti-tools (clang, sysconfig etc.) are installed (``$HOME/ti`` by default) and +``$MCUPSDK`` to the root of the MCU+ SDK (directory called ``mcu_plus_sdk``). +You might have to change version numbers in the commands. It's expected that the +``zephyr.elf`` from the build output is in the current directory. + +.. code-block:: bash + + export BOOTIMAGE_CORE_ID_r5fss0-0=4 + export BOOTIMAGE_CORE_ID_m4=14 + # set CORE_ID as per your target core + export BOOTIMAGE_CORE_ID=${BOOTIMAGE_CORE_ID_desired-core} + $TI_TOOLS/sysconfig_1.21.2/nodejs/node $MCUPSDK/tools/boot/out2rprc/elf2rprc.js ./zephyr.elf + $MCUPSDK/tools/boot/xipGen/xipGen.out -i ./zephyr.rprc -o ./zephyr.rprc_out -x ./zephyr.rprc_out_xip --flash-start-addr 0x60000000 + $TI_TOOLS/sysconfig_1.21.2/nodejs/node $MCUPSDK/tools/boot/multicoreImageGen/multicoreImageGen.js --devID 55 --out ./zephyr.appimage ./zephyr.rprc_out@${BOOTIMAGE_CORE_ID} + $TI_TOOLS/sysconfig_1.21.2/nodejs/node $MCUPSDK/tools/boot/multicoreImageGen/multicoreImageGen.js --devID 55 --out ./zephyr.appimage_xip ./zephyr.rprc_out_xip@${BOOTIMAGE_CORE_ID} + python3 $MCUPSDK/source/security/security_common/tools/boot/signing/appimage_x509_cert_gen.py --bin ./zephyr.appimage --authtype 1 --key $MCUPSDK/source/security/security_common/tools/boot/signing/app_degenerateKey.pem --output ./zephyr.appimage.hs_fs + +All these steps are also present in various Makefiles in the ``examples/`` +directory of MCU+ SDK source. + + +Running the Zephyr image +======================== + +After that you want to switch the bootmode to UART by switching the DIP-Switches +into the following configuration: + +.. list-table:: UART Boot Mode + :header-rows: 1 + + * - SW2 [0:7] + - SW3 [8:15] + * - 11011100 + - 10110000 + +If you want to just run the image via UART you need to run + +.. code-block:: console + + python3 uart_bootloader.py -p /dev/ttyUSB0 --bootloader=sbl_uart.release.hs_fs.tiimage --file=zephyr.appimage.hs_fs + +The ``uart_bootloader.py`` script is found in ``$MCUPSDK/tools/boot`` and the +``sbl_uart.release.hs_fs.tiimage`` in +``$MCUPSDK/tools/boot/sbl_prebuilt/am243x-evm``. After sending the image your +Zephyr application will run after a 2 second long delay. + +If you want to flash the image instead you have to take the OSPI example config +file from the ``$MCUPSDK/tools/boot/sbl_prebuilt/am243x-evm`` directory and +change the filepath according to your names. It should look approximately like: + +.. code-block:: + + --flash-writer=sbl_uart_uniflash.release.hs_fs.tiimage + --operation=flash-phy-tuning-data + --file=sbl_prebuilt/am243x-evm/sbl_ospi.release.hs_fs.tiimage --operation=flash --flash-offset=0x0 + --file=zephyr.appimage.hs_fs --operation=flash --flash-offset=0x80000 + --file=zephyr.appimage_xip --operation=flash-xip + +You then need to run ``python3 uart_uniflash.py -p /dev/ttyUSB0 +--cfg=``. The scripts and images are in the same path +as described in the UART section above. + +After flashing your image you can power off your board, switch the DIP-Switches +into following configuration to boot in OSPI mode and your Zephyr application +will boot immediately after powering on the board. + +.. list-table:: OSPI Boot Mode + :header-rows: 1 + + * - SW2 [0:7] + - SW3 [8:15] + * - 11001110 + - 01000000 + +Debugging +********* + +OpenOCD +======= + +The board is equipped with an XDS110 JTAG debugger. To debug a binary, utilize +the ``debug`` build target: + +.. zephyr-app-commands:: + :app: + :board: am243x_evm// + :maybe-skip-config: + :goals: debug + +.. hint:: + To utilize this feature, you'll need OpenOCD version 0.12 or higher. Due to the possibility of + older versions being available in package feeds, it's advisable to `build OpenOCD from source`_. + +Code Composer Studio +==================== + +Instead of using ``sbl_ospi`` from above, one may also flash ``sbl_null`` and load the +application ELFs using Code Composer Studio IDE to individual cores and run/debug +the application. Note that this does not require converting the Zephyr ELF to another +forma, making development much easier. + + +References +********** + +AM64x/AM243x EVM Technical Reference Manual: + https://www.ti.com/lit/ug/spruj63a/spruj63a.pdf + +MCU+ SDK Github repository: + https://github.com/TexasInstruments/mcupsdk-core + +.. _Bootflow Guide: + https://software-dl.ti.com/mcu-plus-sdk/esd/AM64X/latest/exports/docs/api_guide_am64x/BOOTFLOW_GUIDE.html + +.. _TI TMDS243EVM Product Page: + https://www.ti.com/tool/TMDS243EVM + +.. _build OpenOCD from source: + https://docs.u-boot.org/en/latest/board/ti/k3.html#building-openocd-from-source + +License +******* + +This document Copyright (c) Siemens Mobility GmbH + +This document Copyright (c) 2025 Texas Instruments + +SPDX-License-Identifier: Apache-2.0 diff --git a/boards/ti/am243x_evm/support/openocd.cfg b/boards/ti/am243x_evm/support/openocd.cfg new file mode 100644 index 000000000000..61a4d85b4c3f --- /dev/null +++ b/boards/ti/am243x_evm/support/openocd.cfg @@ -0,0 +1,7 @@ +# Texas Instruments AM243x EVM +# +# Copyright (c) 2025 Texas Instruments +# +# SPDX-License-Identifier: Apache-2.0 + +source [find board/ti_am243_launchpad.cfg] diff --git a/boards/ti/sk_am64/sk_am64_am6442_m4-pinctrl.dtsi b/boards/ti/sk_am64/sk_am64_am6442_m4-pinctrl.dtsi index 034c627336e7..3c4b38376776 100644 --- a/boards/ti/sk_am64/sk_am64_am6442_m4-pinctrl.dtsi +++ b/boards/ti/sk_am64/sk_am64_am6442_m4-pinctrl.dtsi @@ -7,7 +7,9 @@ #include -&pinctrl { +&mcu_pinctrl { + status = "okay"; + mcu_uart0_rx_default: mcu_uart0_rx_default { pinmux = ; /* (A9) MCU_UART0_RXD */ }; diff --git a/boards/ti/sk_am64/sk_am64_am6442_m4.dts b/boards/ti/sk_am64/sk_am64_am6442_m4.dts index 93073c26e737..8387e8291395 100644 --- a/boards/ti/sk_am64/sk_am64_am6442_m4.dts +++ b/boards/ti/sk_am64/sk_am64_am6442_m4.dts @@ -7,6 +7,7 @@ /dts-v1/; +#include #include #include "sk_am64_am6442_m4-pinctrl.dtsi" @@ -16,8 +17,8 @@ chosen { zephyr,sram = &sram0; - zephyr,console = &uart0; - zephyr,shell-uart = &uart0; + zephyr,console = &mcu_uart0; + zephyr,shell-uart = &mcu_uart0; zephyr,ipc = &ipc0; zephyr,ipc_shm = &ddr0; }; @@ -54,7 +55,7 @@ compatible = "gpio-leds"; heartbeat_led: led_0 { - gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>; + gpios = <&mcu_gpio0 5 GPIO_ACTIVE_HIGH>; label = "Heartbeat LED"; }; }; @@ -66,15 +67,20 @@ }; }; -&uart0 { +&mcu_uart0 { current-speed = <115200>; pinctrl-0 = <&mcu_uart0_rx_default &mcu_uart0_tx_default>; pinctrl-names = "default"; status = "okay"; }; -&gpio0 { +&mcu_gpio0 { pinctrl-0 = <&mcu_gpio0_led_default>; pinctrl-names = "default"; status = "okay"; }; + +&mbox6 { + usr-id = <3>; + status = "okay"; +}; diff --git a/drivers/pinctrl/pinctrl_ti_k3.c b/drivers/pinctrl/pinctrl_ti_k3.c index e4e4f6289ab9..2387c8b77fc6 100644 --- a/drivers/pinctrl/pinctrl_ti_k3.c +++ b/drivers/pinctrl/pinctrl_ti_k3.c @@ -9,22 +9,18 @@ #include #include -#define PINCTRL_NODE DT_NODELABEL(pinctrl) - -static struct pinctrl_ti_k3_dev_data { +struct pinctrl_ti_k3_data { DEVICE_MMIO_RAM; -} pinctrl_ti_k3_dev; +}; -static struct pinctrl_ti_k3_cfg_data { +struct pinctrl_ti_k3_cfg { DEVICE_MMIO_ROM; -} pinctrl_ti_k3_cfg = { - DEVICE_MMIO_ROM_INIT(PINCTRL_NODE) }; int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg) { ARG_UNUSED(reg); - const struct device *dev = DEVICE_DT_GET(PINCTRL_NODE); + const struct device *dev = pins->dev; uintptr_t virt_reg_base = DEVICE_MMIO_GET(dev); for (uint8_t i = 0; i < pin_cnt; i++) { @@ -40,11 +36,13 @@ static int pinctrl_ti_k3_init(const struct device *dev) return 0; } -DEVICE_DT_DEFINE(PINCTRL_NODE, - pinctrl_ti_k3_init, - NULL, - &pinctrl_ti_k3_dev, - &pinctrl_ti_k3_cfg, - PRE_KERNEL_1, - CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, - NULL); +#define PINCTRL_TI_K3_INIT(n) \ + static struct pinctrl_ti_k3_data pinctrl_ti_k3_data_##n; \ + static struct pinctrl_ti_k3_cfg pinctrl_ti_k3_cfg_##n = { \ + DEVICE_MMIO_ROM_INIT(DT_DRV_INST(n)), \ + }; \ + DEVICE_DT_INST_DEFINE(n, &pinctrl_ti_k3_init, NULL, &pinctrl_ti_k3_data_##n, \ + &pinctrl_ti_k3_cfg_##n, PRE_KERNEL_1, \ + CONFIG_KERNEL_INIT_PRIORITY_DEFAULT, NULL); + +DT_INST_FOREACH_STATUS_OKAY(PINCTRL_TI_K3_INIT) diff --git a/drivers/timer/ti_dmtimer.c b/drivers/timer/ti_dmtimer.c index 03940c0ce171..f570c6d72d11 100644 --- a/drivers/timer/ti_dmtimer.c +++ b/drivers/timer/ti_dmtimer.c @@ -157,7 +157,7 @@ static int sys_clock_driver_init(void) { struct ti_dm_timer_data *data; - systick_timer_dev = DEVICE_DT_GET(DT_NODELABEL(systick_timer)); + systick_timer_dev = DEVICE_DT_GET(DT_DRV_INST(0)); data = systick_timer_dev->data; diff --git a/dts/arm/ti/am64x_m4.dtsi b/dts/arm/ti/am64x_m4.dtsi index b7e040ef76da..4763c1e26403 100644 --- a/dts/arm/ti/am64x_m4.dtsi +++ b/dts/arm/ti/am64x_m4.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (c) 2024 PHYTEC Messtechnik GmbH + * Copyright (c) 2025 Texas Instruments Incorporated * * SPDX-License-Identifier: Apache-2.0 */ @@ -7,9 +7,9 @@ #include #include #include -#include -#include -#include + +#include "am64x_main.dtsi" +#include "am64x_mcu.dtsi" / { @@ -29,9 +29,9 @@ reg = <0x0 DT_SIZE_K(192)>; /* 192 KB of SRAM (I-Code) */ }; - sram1: memory1@40000 { + sram1: memory1@30000 { compatible = "mmio-sram"; - reg = <0x40000 DT_SIZE_K(64)>; /* 64 KB of SRAM (D-Code) */ + reg = <0x30000 DT_SIZE_K(64)>; /* 64 KB of SRAM (D-Code) */ }; sysclk: system-clock { @@ -39,78 +39,42 @@ clock-frequency = ; #clock-cells = <0>; }; +}; - mbox6: mailbox@29060000 { - compatible = "ti,omap-mailbox"; - reg = <0x29060000 0x200>; - interrupts = <56 4>; - interrupt-parent = <&nvic>; - usr-id = <3>; - #mbox-cells = <1>; - }; - - pinctrl: pinctrl@4084000 { - compatible = "ti,k3-pinctrl"; - reg = <0x04084000 0x88>; - status = "okay"; - }; +&nvic { + arm,num-irq-priority-bits = <3>; +}; - uart0: serial@4a00000 { - compatible = "ns16550"; - reg = <0x04a00000 0x200>; - interrupts = <24 4>; - interrupt-parent = <&nvic>; - clock-frequency = ; - current-speed = <115200>; - reg-shift = <2>; - status = "disabled"; - }; +&systick { + status = "okay"; +}; - uart1: serial@4a10000 { - compatible = "ns16550"; - reg = <0x04a10000 0x200>; - interrupts = <25 4>; - interrupt-parent = <&nvic>; - clock-frequency = ; - current-speed = <115200>; - reg-shift = <2>; - status = "disabled"; - }; +&mcu_uart0 { + interrupts = <24 4>; + interrupt-parent = <&nvic>; +}; - i2c0: i2c@4900000 { - compatible = "ti,omap-i2c"; - reg = <0x04900000 0x100>; - interrupts = <17 4>; - interrupt-parent = <&nvic>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; +&mcu_uart1 { + interrupts = <25 4>; + interrupt-parent = <&nvic>; +}; - i2c1: i2c@4910000 { - compatible = "ti,omap-i2c"; - reg = <0x04910000 0x100>; - interrupts = <18 4>; - interrupt-parent = <&nvic>; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; - }; +&mcu_i2c0 { + interrupts = <17 4>; + interrupt-parent = <&nvic>; +}; - gpio0: gpio@4201010 { - compatible = "ti,davinci-gpio"; - reg = <0x4201010 0x100>; - gpio-controller; - #gpio-cells = <2>; - ngpios = <24>; - status = "disabled"; - }; +&mcu_i2c1 { + interrupts = <18 4>; + interrupt-parent = <&nvic>; }; -&nvic { - arm,num-irq-priority-bits = <3>; +&mbox6 { + interrupts = <56 4>; + interrupt-parent = <&nvic>; }; -&systick { - status = "okay"; +&mbox7 { + interrupts = <57 4>; + interrupt-parent = <&nvic>; }; diff --git a/dts/arm/ti/am64x_main.dtsi b/dts/arm/ti/am64x_main.dtsi new file mode 100644 index 000000000000..a5db82d29a79 --- /dev/null +++ b/dts/arm/ti/am64x_main.dtsi @@ -0,0 +1,262 @@ +/* + * Copyright (c) 2025 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + pinctrl: pinctrl@f4000 { + compatible = "ti,k3-pinctrl"; + reg = <0xf4000 0x2ac>; + status = "disabled"; + }; + + timer0: timer@2400000 { + compatible = "ti,am654-timer"; + reg = <0x2400000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer1: timer@2410000 { + compatible = "ti,am654-timer"; + reg = <0x2410000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer2: timer@2420000 { + compatible = "ti,am654-timer"; + reg = <0x2420000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer3: timer@2430000 { + compatible = "ti,am654-timer"; + reg = <0x2430000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer4: timer@2440000 { + compatible = "ti,am654-timer"; + reg = <0x2440000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer5: timer@2450000 { + compatible = "ti,am654-timer"; + reg = <0x2450000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer6: timer@2460000 { + compatible = "ti,am654-timer"; + reg = <0x2460000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer7: timer@2470000 { + compatible = "ti,am654-timer"; + reg = <0x2470000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer8: timer@2480000 { + compatible = "ti,am654-timer"; + reg = <0x2480000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer9: timer@2490000 { + compatible = "ti,am654-timer"; + reg = <0x2490000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer10: timer@24a0000 { + compatible = "ti,am654-timer"; + reg = <0x24a0000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + timer11: timer@24b0000 { + compatible = "ti,am654-timer"; + reg = <0x24b0000 DT_SIZE_K(1)>; + status = "disabled"; + }; + + uart0: uart@2800000 { + compatible = "ns16550"; + reg = <0x02800000 0x200>; + clock-frequency = ; + reg-shift = <2>; + status = "disabled"; + }; + + uart1: uart@2810000 { + compatible = "ns16550"; + reg = <0x02810000 0x200>; + clock-frequency = ; + reg-shift = <2>; + status = "disabled"; + }; + + uart2: uart@2820000 { + compatible = "ns16550"; + reg = <0x02820000 0x200>; + clock-frequency = ; + reg-shift = <2>; + status = "disabled"; + }; + + uart3: uart@2830000 { + compatible = "ns16550"; + reg = <0x02830000 0x200>; + clock-frequency = ; + reg-shift = <2>; + status = "disabled"; + }; + + uart4: uart@2840000 { + compatible = "ns16550"; + reg = <0x02840000 0x200>; + clock-frequency = ; + reg-shift = <2>; + status = "disabled"; + }; + + uart5: uart@2850000 { + compatible = "ns16550"; + reg = <0x02850000 0x200>; + clock-frequency = ; + reg-shift = <2>; + status = "disabled"; + }; + + uart6: uart@2860000 { + compatible = "ns16550"; + reg = <0x02860000 0x200>; + clock-frequency = ; + reg-shift = <2>; + status = "disabled"; + }; + + i2c0: i2c0@20000000 { + compatible = "ti,omap-i2c"; + reg = <0x20000000 0x100>; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c1: i2c0@20010000 { + compatible = "ti,omap-i2c"; + reg = <0x20010000 0x100>; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c2: i2c0@20020000 { + compatible = "ti,omap-i2c"; + reg = <0x20020000 0x100>; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + i2c3: i2c0@20030000 { + compatible = "ti,omap-i2c"; + reg = <0x20030000 0x100>; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + gpio0: gpio@600010 { + compatible = "ti,davinci-gpio"; + reg = <0x600010 0x100>; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + gpio1: gpio@601010 { + compatible = "ti,davinci-gpio"; + reg = <0x601010 0x100>; + gpio-controller; + #gpio-cells = <2>; + status = "disabled"; + }; + + /* users: r5f0_0, r5f0_1, r5f1_0, r5f1_1 */ + mbox0: mailbox@29000000 { + compatible = "ti,omap-mailbox"; + reg = <0x29000000 0x200>; + #mbox-cells = <1>; + status = "disabled"; + }; + + /* users: r5f0_0, r5f0_1, r5f1_0, r5f1_1 */ + mbox1: mailbox@29010000 { + compatible = "ti,omap-mailbox"; + reg = <0x29010000 0x200>; + #mbox-cells = <1>; + status = "disabled"; + }; + + /* users: r5f0_0, r5f0_1, a53 */ + mbox2: mailbox@29020000 { + compatible = "ti,omap-mailbox"; + reg = <0x29020000 0x200>; + #mbox-cells = <1>; + status = "disabled"; + }; + + /* users: r5f0_0, r5f0_1, a53 */ + mbox3: mailbox@29030000 { + compatible = "ti,omap-mailbox"; + reg = <0x29030000 0x200>; + #mbox-cells = <1>; + status = "disabled"; + }; + + /* users: r5f1_0, r5f1_1, a53 */ + mbox4: mailbox@29040000 { + compatible = "ti,omap-mailbox"; + reg = <0x29040000 0x200>; + #mbox-cells = <1>; + status = "disabled"; + }; + + /* users: r5f1_0, r5f1_1, a53 */ + mbox5: mailbox@29050000 { + compatible = "ti,omap-mailbox"; + reg = <0x29050000 0x200>; + #mbox-cells = <1>; + status = "disabled"; + }; + + /* users: r5f0_0, r5f0_1, a53, m4 */ + mbox6: mailbox@29060000 { + compatible = "ti,omap-mailbox"; + reg = <0x29060000 0x200>; + #mbox-cells = <1>; + status = "disabled"; + }; + + /* users: r5f1_0, r5f1_1, a53, m4 */ + mbox7: mailbox@29070000 { + compatible = "ti,omap-mailbox"; + reg = <0x29070000 0x200>; + #mbox-cells = <1>; + status = "disabled"; + }; +}; diff --git a/dts/arm/ti/am64x_mcu.dtsi b/dts/arm/ti/am64x_mcu.dtsi new file mode 100644 index 000000000000..0d01cf347985 --- /dev/null +++ b/dts/arm/ti/am64x_mcu.dtsi @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2025 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + mcu_pinctrl: pinctrl@4084000 { + compatible = "ti,k3-pinctrl"; + reg = <0x04084000 0x88>; + status = "disabled"; + }; + + mcu_uart0: serial@4a00000 { + compatible = "ns16550"; + reg = <0x04a00000 0x200>; + clock-frequency = ; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + mcu_uart1: serial@4a10000 { + compatible = "ns16550"; + reg = <0x04a10000 0x200>; + clock-frequency = ; + current-speed = <115200>; + reg-shift = <2>; + status = "disabled"; + }; + + mcu_i2c0: i2c0@4900000 { + compatible = "ti,omap-i2c"; + reg = <0x4900000 0x100>; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + mcu_i2c1: i2c0@4910000 { + compatible = "ti,omap-i2c"; + reg = <0x4910000 0x100>; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + mcu_gpio0: gpio@4201010 { + compatible = "ti,davinci-gpio"; + reg = <0x4201010 0x100>; + gpio-controller; + #gpio-cells = <2>; + ngpios = <23>; + status = "disabled"; + }; +}; diff --git a/dts/arm/ti/am64x_r5.dtsi b/dts/arm/ti/am64x_r5.dtsi new file mode 100644 index 000000000000..80e610485d4a --- /dev/null +++ b/dts/arm/ti/am64x_r5.dtsi @@ -0,0 +1,234 @@ +/* + * Copyright (c) 2025 Texas Instruments Incorporated + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include +#include "am64x_main.dtsi" +#include "am64x_mcu.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-r5"; + reg = <0>; + clock-frequency = ; + }; + }; + + atcm: memory@0 { + device_type = "memory"; + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x0 DT_SIZE_K(32)>; + zephyr,memory-region = "ATCM"; + zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; + }; + + btcm: memory@41010000 { + device_type = "memory"; + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x41010000 DT_SIZE_K(32)>; + zephyr,memory-region = "BTCM"; + zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_RAM) )>; + }; + + sram: memory@70080000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x70080000 DT_SIZE_K(256)>; + zephyr,memory-region = "SRAM"; + }; + + vim: interrupt-controller@2fff0000 { + #address-cells = <1>; + compatible = "ti,vim"; + reg = <0x2fff0000 0x4000>; + interrupt-controller; + #interrupt-cells = <4>; /* {IRQ/FIQ, IRQ_NUM, IRQ_TYPE, IRQ_PRIO} */ + }; +}; + +&timer0 { + interrupts = <0 152 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer1 { + interrupts = <0 153 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer2 { + interrupts = <0 154 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer3 { + interrupts = <0 155 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer4 { + interrupts = <0 156 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer5 { + interrupts = <0 157 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer6 { + interrupts = <0 158 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer7 { + interrupts = <0 159 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer8 { + interrupts = <0 160 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer9 { + interrupts = <0 161 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer10 { + interrupts = <0 162 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&timer11 { + interrupts = <0 163 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&uart0 { + interrupts = <0 210 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&uart1 { + interrupts = <0 211 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&uart2 { + interrupts = <0 212 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&uart3 { + interrupts = <0 213 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&uart4 { + interrupts = <0 214 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&uart5 { + interrupts = <0 215 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&uart6 { + interrupts = <0 216 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&i2c0 { + interrupts = <0 193 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&i2c1 { + interrupts = <0 194 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&i2c2 { + interrupts = <0 195 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&i2c3 { + interrupts = <0 196 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mcu_uart0 { + interrupts = <0 217 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mcu_uart1 { + interrupts = <0 218 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mcu_i2c0 { + interrupts = <0 61 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mcu_i2c1 { + interrupts = <0 62 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mbox0 { + interrupts = <0 96 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mbox1 { + interrupts = <0 97 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mbox2 { + interrupts = <0 98 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mbox3 { + interrupts = <0 99 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mbox4 { + interrupts = <0 98 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mbox5 { + interrupts = <0 99 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mbox6 { + interrupts = <0 100 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; + +&mbox7 { + interrupts = <0 100 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>; + interrupt-parent = <&vim>; +}; diff --git a/soc/ti/k3/am6x/CMakeLists.txt b/soc/ti/k3/am6x/CMakeLists.txt index 79e4cd125961..9f29556d51e0 100644 --- a/soc/ti/k3/am6x/CMakeLists.txt +++ b/soc/ti/k3/am6x/CMakeLists.txt @@ -21,6 +21,7 @@ elseif(CONFIG_SOC_SERIES_AM6X_M4) set(SOC_LINKER_SCRIPT ${CMAKE_CURRENT_SOURCE_DIR}/m4/linker.ld CACHE INTERNAL "") elseif(CONFIG_SOC_SERIES_AM6X_R5) zephyr_sources(r5/soc.c) + zephyr_sources_ifdef(CONFIG_ARM_MPU r5/arm_mpu_regions.c) zephyr_include_directories(r5) diff --git a/soc/ti/k3/am6x/Kconfig b/soc/ti/k3/am6x/Kconfig index 2612712d5512..49571a2e0a0f 100644 --- a/soc/ti/k3/am6x/Kconfig +++ b/soc/ti/k3/am6x/Kconfig @@ -33,6 +33,7 @@ config SOC_SERIES_AM6X_R5 select SOC_EARLY_INIT_HOOK config SOC_PART_NUMBER + default "AM2434" if SOC_AM2434_M4 || SOC_AM2434_R5F0_0 default "AM6232" if SOC_AM6232_M4 default "AM6234" if SOC_AM6234_A53 default "AM6234" if SOC_AM6234_M4 diff --git a/soc/ti/k3/am6x/Kconfig.soc b/soc/ti/k3/am6x/Kconfig.soc index 8efcc1ed546c..bf943f358080 100644 --- a/soc/ti/k3/am6x/Kconfig.soc +++ b/soc/ti/k3/am6x/Kconfig.soc @@ -39,6 +39,14 @@ config SOC_AM6442_M4 bool select SOC_SERIES_AM6X_M4 +config SOC_AM2434_M4 + bool + select SOC_SERIES_AM6X_M4 + +config SOC_AM2434_R5F0_0 + bool + select SOC_SERIES_AM6X_R5 + config SOC_J721E_MAIN_R5F0_0 bool select SOC_SERIES_AM6X_R5 @@ -55,6 +63,7 @@ config SOC_SERIES default "am6x" if SOC_SERIES_AM6X config SOC + default "am2434" if SOC_AM2434_M4 || SOC_AM2434_R5F0_0 default "am6232" if SOC_AM6232_M4 default "am6234" if SOC_AM6234_M4 || SOC_AM6234_A53 default "am6442" if SOC_AM6442_M4 diff --git a/soc/ti/k3/am6x/common/ctrl_partitions.c b/soc/ti/k3/am6x/common/ctrl_partitions.c index 83df836e5ce8..a5c8e54563de 100644 --- a/soc/ti/k3/am6x/common/ctrl_partitions.c +++ b/soc/ti/k3/am6x/common/ctrl_partitions.c @@ -17,19 +17,27 @@ #define CTRL_PARTITION_SIZE (0x4000) #define CTRL_PARTITION(base, part) ((base) + (part) * CTRL_PARTITION_SIZE) -#if defined CONFIG_SOC_AM6442_M4 +#if defined CONFIG_SOC_AM6442_M4 || defined CONFIG_SOC_AM2434_M4 #define MCU_PADCFG_BASE (0x4080000) #elif defined CONFIG_SOC_AM6234_M4 | defined CONFIG_SOC_AM6232_M4 #define WKUP_PADCFG_BASE (0x4080000) +#elif defined CONFIG_SOC_AM2434_R5F0_0 +#define MCU_PADCFG_BASE (0x4080000) +#define MAIN_PADCFG_BASE (0xf0000) #endif static const uintptr_t ctrl_partitions[] = { -#if defined CONFIG_SOC_AM6442_M4 +#if defined CONFIG_SOC_AM6442_M4 || defined CONFIG_SOC_AM2434_M4 CTRL_PARTITION(MCU_PADCFG_BASE, 0), CTRL_PARTITION(MCU_PADCFG_BASE, 1), #elif defined CONFIG_SOC_AM6234_M4 | defined CONFIG_SOC_AM6232_M4 CTRL_PARTITION(WKUP_PADCFG_BASE, 0), CTRL_PARTITION(WKUP_PADCFG_BASE, 1), +#elif defined CONFIG_SOC_AM2434_R5F0_0 + CTRL_PARTITION(MAIN_PADCFG_BASE, 0), + CTRL_PARTITION(MAIN_PADCFG_BASE, 1), + CTRL_PARTITION(MCU_PADCFG_BASE, 0), + CTRL_PARTITION(MCU_PADCFG_BASE, 1), #endif }; diff --git a/soc/ti/k3/am6x/pinctrl_soc.h b/soc/ti/k3/am6x/pinctrl_soc.h index 055215db7f26..56795419fcaf 100644 --- a/soc/ti/k3/am6x/pinctrl_soc.h +++ b/soc/ti/k3/am6x/pinctrl_soc.h @@ -15,6 +15,7 @@ extern "C" { #endif struct pinctrl_soc_pin { + const struct device *dev; uint32_t offset; uint32_t value; }; @@ -23,6 +24,7 @@ typedef struct pinctrl_soc_pin pinctrl_soc_pin_t; #define TI_K3_DT_PIN(node_id) \ { \ + .dev = DEVICE_DT_GET(DT_PARENT(node_id)), \ .offset = DT_PROP_BY_IDX(node_id, pinmux, 0), \ .value = DT_PROP_BY_IDX(node_id, pinmux, 1) \ }, diff --git a/soc/ti/k3/am6x/r5/arm_mpu_regions.c b/soc/ti/k3/am6x/r5/arm_mpu_regions.c new file mode 100644 index 000000000000..495224a0597b --- /dev/null +++ b/soc/ti/k3/am6x/r5/arm_mpu_regions.c @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2025 Texas Instruments + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include +#include +#include + +/* userspace threads require RO access to .text and .rodata */ +#ifdef CONFIG_USERSPACE +#define PERM_Msk P_RW_U_RO_Msk +#else +#define PERM_Msk P_RW_U_NA_Msk +#endif + +static const struct arm_mpu_region mpu_regions[] = { +#if defined CONFIG_SOC_AM2434_R5F0_0 + MPU_REGION_ENTRY("Device", 0x0, REGION_2G, {MPU_RASR_S_Msk | NOT_EXEC | PERM_Msk}), +#endif + + MPU_REGION_ENTRY( + "SRAM", CONFIG_SRAM_BASE_ADDRESS, REGION_SRAM_SIZE, + {NORMAL_OUTER_INNER_WRITE_BACK_WRITE_READ_ALLOCATE_NON_SHAREABLE | PERM_Msk}), +}; + +const struct arm_mpu_config mpu_config = { + .num_regions = ARRAY_SIZE(mpu_regions), + .mpu_regions = mpu_regions, +}; diff --git a/soc/ti/k3/soc.yml b/soc/ti/k3/soc.yml index dbfc4d30f4b8..96c56ed6f3b1 100644 --- a/soc/ti/k3/soc.yml +++ b/soc/ti/k3/soc.yml @@ -13,6 +13,10 @@ family: - name: am6442 cpuclusters: - name: m4 + - name: am2434 + cpuclusters: + - name: m4 + - name: r5f0_0 - name: j721e cpuclusters: - name: main_r5f0_0