auto approve

.github/CODEOWNERS

@@ -22,7 +22,7 @@ libdevice/ @vzakhari @jinge90
 sycl/ @intel/llvm-reviewers-runtime
 
 # Documentation
-sycl/ReleaseNotes.md @pvchupin
+sycl/ReleaseNotes.md @pvchupin @tfzhu
 sycl/doc/ @pvchupin @bader
 sycl/doc/extensions/ @intel/dpcpp-specification-reviewers
 

CONTRIBUTING.md

@@ -38,7 +38,9 @@ see [ABI Policy Guide](sycl/doc/ABIPolicyGuide.md) for more information.
   - [clang-format](https://clang.llvm.org/docs/ClangFormat.html) and
     [clang-tidy](https://clang.llvm.org/extra/clang-tidy/) tools can be
     integrated into your workflow to ensure formatting and stylistic
-    compliance of your changes.
+    compliance of your changes. To avoid code formatting misalignment with
+    GitHub Actions check we recommend using 10 version of clang-format tool
+    (default version on Ubuntu 20.04).
   - use
 
     ```bash

buildbot/dependency.conf

@@ -4,8 +4,8 @@ ocl_cpu_rt_ver=2021.12.6.0.19
 # https://github.com/intel/llvm/releases/download/2021-WW26/win-oclcpuexp-2021.12.6.0.19_rel.zip
 ocl_cpu_rt_ver_win=2021.12.6.0.19
 # Same GPU driver supports Level Zero and OpenCL
-# https://github.com/intel/compute-runtime/releases/tag/21.33.20678
-ocl_gpu_rt_ver=21.33.20678
+# https://github.com/intel/compute-runtime/releases/tag/21.34.20767
+ocl_gpu_rt_ver=21.34.20767
 # Same GPU driver supports Level Zero and OpenCL
 # https://downloadmirror.intel.com/646152/igfx_win_100.9805.zip
 ocl_gpu_rt_ver_win=30.0.100.9805
@@ -30,7 +30,7 @@ ocloc_ver_win=27.20.100.9168
 [DRIVER VERSIONS]
 cpu_driver_lin=2021.12.6.0.19
 cpu_driver_win=2021.12.6.0.19
-gpu_driver_lin=21.33.20678
+gpu_driver_lin=21.34.20767
 gpu_driver_win=30.0.100.9805
 fpga_driver_lin=2021.12.6.0.19
 fpga_driver_win=2021.12.6.0.19

clang/include/clang/Basic/Attr.td

@@ -2170,7 +2170,7 @@ def : MutualExclusions<[IntelFPGADoublePump, IntelFPGASinglePump,
                         IntelFPGARegister]>;
 
 // One integral argument.
-def IntelFPGABankWidth : Attr {
+def IntelFPGABankWidth : InheritableAttr {
   let Spellings = [CXX11<"intelfpga","bankwidth">,
                    CXX11<"intel","bankwidth">];
   let Args = [ExprArgument<"Value">];
@@ -2181,7 +2181,7 @@ def IntelFPGABankWidth : Attr {
 }
 def : MutualExclusions<[IntelFPGARegister, IntelFPGABankWidth]>;
 
-def IntelFPGANumBanks : Attr {
+def IntelFPGANumBanks : InheritableAttr {
   let Spellings = [CXX11<"intelfpga","numbanks">,
                    CXX11<"intel","numbanks">];
   let Args = [ExprArgument<"Value">];
@@ -2260,6 +2260,7 @@ def IntelFPGABankBits : Attr {
   let Documentation = [IntelFPGABankBitsDocs];
 }
 def : MutualExclusions<[IntelFPGARegister, IntelFPGABankBits]>;
+def : MutualExclusions<[IntelFPGARegister, IntelFPGANumBanks]>;
 
 def IntelFPGAForcePow2Depth : InheritableAttr {
   let Spellings = [CXX11<"intelfpga","force_pow2_depth">,

clang/include/clang/Sema/Sema.h

@@ -10410,9 +10410,6 @@ class Sema final {
   /// attribute to be added (usually because of a pragma).
   void AddOptnoneAttributeIfNoConflicts(FunctionDecl *FD, SourceLocation Loc);
 
-  template <typename AttrType>
-  void AddOneConstantPowerTwoValueAttr(Decl *D, const AttributeCommonInfo &CI,
-                                       Expr *E);
   void AddIntelFPGABankBitsAttr(Decl *D, const AttributeCommonInfo &CI,
                                 Expr **Exprs, unsigned Size);
   template <typename AttrType>
@@ -10476,6 +10473,14 @@ class Sema final {
   SYCLIntelMaxGlobalWorkDimAttr *
   MergeSYCLIntelMaxGlobalWorkDimAttr(Decl *D,
                                      const SYCLIntelMaxGlobalWorkDimAttr &A);
+  void AddIntelFPGABankWidthAttr(Decl *D, const AttributeCommonInfo &CI,
+                                 Expr *E);
+  IntelFPGABankWidthAttr *
+  MergeIntelFPGABankWidthAttr(Decl *D, const IntelFPGABankWidthAttr &A);
+  void AddIntelFPGANumBanksAttr(Decl *D, const AttributeCommonInfo &CI,
+                                Expr *E);
+  IntelFPGANumBanksAttr *
+  MergeIntelFPGANumBanksAttr(Decl *D, const IntelFPGANumBanksAttr &A);
   /// AddAlignedAttr - Adds an aligned attribute to a particular declaration.
   void AddAlignedAttr(Decl *D, const AttributeCommonInfo &CI, Expr *E,
                       bool IsPackExpansion);
@@ -13540,53 +13545,6 @@ void Sema::addIntelTripleArgAttr(Decl *D, const AttributeCommonInfo &CI,
                  WorkGroupAttrType(Context, CI, XDimExpr, YDimExpr, ZDimExpr));
 }
 
-template <typename AttrType>
-void Sema::AddOneConstantPowerTwoValueAttr(Decl *D,
-                                           const AttributeCommonInfo &CI,
-                                           Expr *E) {
-  AttrType TmpAttr(Context, CI, E);
-
-  if (!E->isValueDependent()) {
-    llvm::APSInt Value;
-    ExprResult ICE = VerifyIntegerConstantExpression(E, &Value);
-    if (ICE.isInvalid())
-      return;
-    if (!Value.isStrictlyPositive()) {
-      Diag(E->getExprLoc(), diag::err_attribute_requires_positive_integer)
-          << CI << /*positive*/ 0;
-      return;
-    }
-    if (!Value.isPowerOf2()) {
-      Diag(CI.getLoc(), diag::err_attribute_argument_not_power_of_two)
-          << &TmpAttr;
-      return;
-    }
-    if (IntelFPGANumBanksAttr::classof(&TmpAttr)) {
-      if (auto *BBA = D->getAttr<IntelFPGABankBitsAttr>()) {
-        unsigned NumBankBits = BBA->args_size();
-        if (NumBankBits != Value.ceilLogBase2()) {
-          Diag(TmpAttr.getLocation(), diag::err_bankbits_numbanks_conflicting);
-          return;
-        }
-      }
-    }
-    E = ICE.get();
-  }
-
-  if (!D->hasAttr<IntelFPGAMemoryAttr>())
-    D->addAttr(IntelFPGAMemoryAttr::CreateImplicit(
-        Context, IntelFPGAMemoryAttr::Default));
-
-  // We are adding a user NumBanks, drop any implicit default.
-  if (IntelFPGANumBanksAttr::classof(&TmpAttr)) {
-    if (auto *NBA = D->getAttr<IntelFPGANumBanksAttr>())
-      if (NBA->isImplicit())
-        D->dropAttr<IntelFPGANumBanksAttr>();
-  }
-
-  D->addAttr(::new (Context) AttrType(Context, CI, E));
-}
-
 /// RAII object that enters a new expression evaluation context.
 class EnterExpressionEvaluationContext {
   Sema &Actions;

clang/lib/Driver/Driver.cpp

@@ -925,8 +925,17 @@ void Driver::CreateOffloadingDeviceToolChains(Compilation &C,
 
           // Warn about deprecated `sycldevice` environment component.
           if (TT.getEnvironmentName() == "sycldevice") {
+            // Build a string with suggested target triple.
+            std::string SuggestedTriple = TT.getArchName().str();
+            if (TT.getOS() != llvm::Triple::UnknownOS) {
+              SuggestedTriple += '-';
+              if (TT.getVendor() != llvm::Triple::UnknownVendor)
+                SuggestedTriple += TT.getVendorName();
+              SuggestedTriple += Twine("-" + TT.getOSName()).str();
+            } else if (TT.getVendor() != llvm::Triple::UnknownVendor)
+              SuggestedTriple += Twine("-" + TT.getVendorName()).str();
             Diag(clang::diag::warn_drv_deprecated_arg)
-                << TT.str() << TT.getArchName();
+                << TT.str() << SuggestedTriple;
             // Drop environment component.
             std::string EffectiveTriple =
                 Twine(TT.getArchName() + "-" + TT.getVendorName() + "-" +
@@ -4769,7 +4778,7 @@ class OffloadingActionBuilder final {
       auto *DeviceCodeSplitArg =
           Args.getLastArg(options::OPT_fsycl_device_code_split_EQ);
       // -fsycl-device-code-split is an alias to
-      // -fsycl-device-code-split=per_source
+      // -fsycl-device-code-split=auto
       DeviceCodeSplit = DeviceCodeSplitArg &&
                         DeviceCodeSplitArg->getValue() != StringRef("off");
       // Gather information about the SYCL Ahead of Time targets.  The targets

clang/lib/Driver/ToolChains/Clang.cpp

@@ -1434,18 +1434,18 @@ void Clang::AddPreprocessingOptions(Compilation &C, const JobAction &JA,
 
   // The file being compiled that contains the integration footer is not being
   // compiled in the directory of the original source.  Add that directory
-  // as an -I option so we can properly find potential headers there.  The
-  // original source search directory should also be placed before any user
+  // as an -iquote option so we can properly find potential user headers there.
+  // The original source search directory should also be placed before any user
   // search directories.
   if (ContainsAppendFooterAction(&JA)) {
     SmallString<128> SourcePath(Inputs[0].getBaseInput());
     llvm::sys::path::remove_filename(SourcePath);
     if (!SourcePath.empty()) {
-      CmdArgs.push_back("-I");
+      CmdArgs.push_back("-iquote");
       CmdArgs.push_back(Args.MakeArgString(SourcePath));
     } else if (llvm::ErrorOr<std::string> CWD =
                    D.getVFS().getCurrentWorkingDirectory()) {
-      CmdArgs.push_back("-I");
+      CmdArgs.push_back("-iquote");
       CmdArgs.push_back(Args.MakeArgString(*CWD));
     }
   }
@@ -4407,11 +4407,11 @@ void Clang::ConstructHostCompilerJob(Compilation &C, const JobAction &JA,
   SmallString<128> SourcePath(InputFile.getBaseInput());
   llvm::sys::path::remove_filename(SourcePath);
   if (!SourcePath.empty()) {
-    HostCompileArgs.push_back("-I");
+    HostCompileArgs.push_back(IsMSVCHostCompiler ? "-I" : "-iquote");
     HostCompileArgs.push_back(TCArgs.MakeArgString(SourcePath));
   } else if (llvm::ErrorOr<std::string> CWD =
                  TC.getDriver().getVFS().getCurrentWorkingDirectory()) {
-    HostCompileArgs.push_back("-I");
+    HostCompileArgs.push_back(IsMSVCHostCompiler ? "-I" : "-iquote");
     HostCompileArgs.push_back(TCArgs.MakeArgString(*CWD));
   }
 
@@ -7109,7 +7109,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA,
   if (IsHIP)
     CmdArgs.push_back("-fcuda-allow-variadic-functions");
 
-  if (IsCudaDevice || IsHIPDevice) {
+  if (IsCudaDevice || IsHIPDevice || IsSYCLOffloadDevice) {
     StringRef InlineThresh =
         Args.getLastArgValue(options::OPT_fgpu_inline_threshold_EQ);
     if (!InlineThresh.empty()) {

clang/lib/Sema/SemaDecl.cpp

@@ -2704,6 +2704,10 @@ static bool mergeDeclAttribute(Sema &S, NamedDecl *D,
     NewAttr = S.MergeSYCLIntelMaxGlobalWorkDimAttr(D, *A);
   else if (const auto *BTFA = dyn_cast<BTFTagAttr>(Attr))
     NewAttr = S.mergeBTFTagAttr(D, *BTFA);
+  else if (const auto *A = dyn_cast<IntelFPGABankWidthAttr>(Attr))
+    NewAttr = S.MergeIntelFPGABankWidthAttr(D, *A);
+  else if (const auto *A = dyn_cast<IntelFPGANumBanksAttr>(Attr))
+    NewAttr = S.MergeIntelFPGANumBanksAttr(D, *A);
   else if (Attr->shouldInheritEvenIfAlreadyPresent() || !DeclHasAttr(D, Attr))
     NewAttr = cast<InheritableAttr>(Attr->clone(S.Context));