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Reorganise opcode space #826
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lgtm |
| `i32.or` | `0x72` | | | | ||
| `i32.xor` | `0x73` | | | | ||
| `i32.shl` | `0x74` | | | | ||
| `i32.shr_u` | `0x75` | | | |
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the doc has i32.shr_s
before i32.shr_u
(which is consistent with the rest of the ops)
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Thanks, fixed.
| `i64.or` | `0x84` | | | | ||
| `i64.xor` | `0x85` | | | | ||
| `i64.shl` | `0x86` | | | | ||
| `i64.shr_u` | `0x87` | | | |
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same here
@@ -425,18 +425,16 @@ It is legal to have several entries with the same type. | |||
| Name | Opcode | Immediates | Description | | |||
| ---- | ---- | ---- | ---- | | |||
| `unreachable` | `0x00` | | trap immediately | | |||
| `block` | `0x01` | sig : `inline_signature_type` | begin a sequence of expressions, yielding 0 or 1 values | |
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This doesn't match your "alternative opcode proposal". BLock has value 0x2 (nop is 0x1).
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Hm, this is a -
line in the diff?
@@ -515,132 +523,154 @@ natural alignment. The bits after the | |||
`log(memory-access-size)` least-significant bits must be set to 0. These bits are reserved for future use | |||
(e.g., for shared memory ordering requirements). | |||
|
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## Simple operators ([described here](Semantics.md#32-bit-integer-operators)) | |||
## Basic operators ([described here](Semantics.md#constants)) |
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Constant generating operators?
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Done (just "Constants")
lgtm other than nit |
...as shown here: https://docs.google.com/spreadsheets/d/1RglIQM97cP83Sy-J3BT3D7IxdcH3QCKftiM1bjOL2vc