[vm/ffi] Stop using R8 in FFI calls, callbacks and stubs on arm64

R8 is used for passing the address when returning structs by value
in the native ABI.

Separated out from https://dart-review.googlesource.com/c/sdk/+/140290

Issue: #36730

Change-Id: I35187d35b8cd1b9fe6852faf0cd02a5f51e9f358
Cq-Include-Trybots: luci.dart.try:vm-ffi-android-debug-arm-try,vm-ffi-android-debug-arm64-try,vm-precomp-ffi-qemu-linux-release-arm-try,vm-kernel-linux-debug-ia32-try,vm-kernel-linux-debug-x64-try
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/163204
Reviewed-by: Tess Strickland <[email protected]>
Commit-Queue: Tess Strickland <[email protected]>
Auto-Submit: Daco Harkes <[email protected]>

Author: dcharkes

runtime/vm/compiler/backend/il_arm64.cc

@@ -1170,8 +1170,8 @@ void FfiCallInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
                THR, compiler::target::Thread::
                         call_native_through_safepoint_entry_point_offset()));
 
-    // Calls R8 and clobbers R19 (along with volatile registers).
-    ASSERT(branch == R8 && temp == R19);
+    // Calls R9 and clobbers R19 (along with volatile registers).
+    ASSERT(branch == R9 && temp == R19);
     __ blr(TMP);
   }
 

runtime/vm/compiler/stub_code_compiler_arm64.cc

@@ -291,7 +291,7 @@ void StubCodeCompiler::GenerateExitSafepointStub(Assembler* assembler) {
 // Calls native code within a safepoint.
 //
 // On entry:
-//   R8: target to call
+//   R9: target to call
 //   Stack: set up for native call (SP), aligned, CSP < SP
 //
 // On exit:
@@ -302,29 +302,29 @@ void StubCodeCompiler::GenerateCallNativeThroughSafepointStub(
   COMPILE_ASSERT((1 << R19) & kAbiPreservedCpuRegs);
 
   __ mov(R19, LR);
-  __ LoadImmediate(R9, target::Thread::exit_through_ffi());
-  __ TransitionGeneratedToNative(R8, FPREG, R9 /*volatile*/,
+  __ LoadImmediate(R10, target::Thread::exit_through_ffi());
+  __ TransitionGeneratedToNative(R9, FPREG, R10 /*volatile*/,
                                  /*enter_safepoint=*/true);
   __ mov(R25, CSP);
   __ mov(CSP, SP);
 
 #if defined(DEBUG)
   // Check CSP alignment.
-  __ andi(R10 /*volatile*/, SP,
+  __ andi(R11 /*volatile*/, SP,
           Immediate(~(OS::ActivationFrameAlignment() - 1)));
-  __ cmp(R10, Operand(SP));
+  __ cmp(R11, Operand(SP));
   Label done;
   __ b(&done, EQ);
   __ Breakpoint();
   __ Bind(&done);
 #endif
 
-  __ blr(R8);
+  __ blr(R9);
 
   __ mov(SP, CSP);
   __ mov(CSP, R25);
 
-  __ TransitionNativeToGenerated(R9, /*leave_safepoint=*/true);
+  __ TransitionNativeToGenerated(R10, /*leave_safepoint=*/true);
   __ ret(R19);
 }
 
@@ -338,16 +338,16 @@ void StubCodeCompiler::GenerateJITCallbackTrampolines(
 #else
   Label done;
 
-  // R8 is volatile and not used for passing any arguments.
-  COMPILE_ASSERT(!IsCalleeSavedRegister(R8) && !IsArgumentRegister(R8));
+  // R9 is volatile and not used for passing any arguments.
+  COMPILE_ASSERT(!IsCalleeSavedRegister(R9) && !IsArgumentRegister(R9));
   for (intptr_t i = 0;
        i < NativeCallbackTrampolines::NumCallbackTrampolinesPerPage(); ++i) {
     // We don't use LoadImmediate because we need the trampoline size to be
     // fixed independently of the callback ID.
     //
     // Instead we paste the callback ID directly in the code load it
     // PC-relative.
-    __ ldr(R8, compiler::Address::PC(2 * Instr::kInstrSize));
+    __ ldr(R9, compiler::Address::PC(2 * Instr::kInstrSize));
     __ b(&done);
     __ Emit(next_callback_id + i);
   }
@@ -362,7 +362,7 @@ void StubCodeCompiler::GenerateJITCallbackTrampolines(
 
   // The load of the callback ID might have incorrect higher-order bits, since
   // we only emit a 32-bit callback ID.
-  __ uxtw(R8, R8);
+  __ uxtw(R9, R9);
 
   // Save THR (callee-saved) and LR on real real C stack (CSP). Keeps it
   // aligned.
@@ -374,8 +374,8 @@ void StubCodeCompiler::GenerateJITCallbackTrampolines(
   RegisterSet all_registers;
   all_registers.AddAllArgumentRegisters();
 
-  // The call below might clobber R8 (volatile, holding callback_id).
-  all_registers.Add(Location::RegisterLocation(R8));
+  // The call below might clobber R9 (volatile, holding callback_id).
+  all_registers.Add(Location::RegisterLocation(R9));
 
   // Load the thread, verify the callback ID and exit the safepoint.
   //
@@ -396,7 +396,7 @@ void StubCodeCompiler::GenerateJITCallbackTrampolines(
     // loaded anywhere, we use the same trick as before to ensure a predictable
     // instruction sequence.
     Label call;
-    __ mov(R0, R8);
+    __ mov(R0, R9);
     __ ldr(R1, compiler::Address::PC(2 * Instr::kInstrSize));
     __ b(&call);
 
@@ -415,29 +415,30 @@ void StubCodeCompiler::GenerateJITCallbackTrampolines(
     __ mov(CSP, SP);
   }
 
-  COMPILE_ASSERT(!IsCalleeSavedRegister(R9) && !IsArgumentRegister(R9));
+  COMPILE_ASSERT(!IsCalleeSavedRegister(R10) && !IsArgumentRegister(R10));
 
   // Load the code object.
-  __ LoadFromOffset(R9, THR, compiler::target::Thread::callback_code_offset());
-  __ LoadFieldFromOffset(R9, R9,
+  __ LoadFromOffset(R10, THR, compiler::target::Thread::callback_code_offset());
+  __ LoadFieldFromOffset(R10, R10,
                          compiler::target::GrowableObjectArray::data_offset());
-  __ ldr(R9, __ ElementAddressForRegIndex(
-                 /*external=*/false,
-                 /*array_cid=*/kArrayCid,
-                 /*index, smi-tagged=*/compiler::target::kWordSize * 2,
-                 /*index_unboxed=*/false,
-                 /*array=*/R9,
-                 /*index=*/R8,
-                 /*temp=*/TMP));
-  __ LoadFieldFromOffset(R9, R9, compiler::target::Code::entry_point_offset());
-
-  // Clobbers all volatile registers, including the callback ID in R8.
+  __ ldr(R10, __ ElementAddressForRegIndex(
+                  /*external=*/false,
+                  /*array_cid=*/kArrayCid,
+                  /*index, smi-tagged=*/compiler::target::kWordSize * 2,
+                  /*index_unboxed=*/false,
+                  /*array=*/R10,
+                  /*index=*/R9,
+                  /*temp=*/TMP));
+  __ LoadFieldFromOffset(R10, R10,
+                         compiler::target::Code::entry_point_offset());
+
+  // Clobbers all volatile registers, including the callback ID in R9.
   // Resets CSP and SP, important for EnterSafepoint below.
-  __ blr(R9);
+  __ blr(R10);
 
-  // EnterSafepoint clobbers TMP, TMP2 and R8 -- all volatile and not holding
+  // EnterSafepoint clobbers TMP, TMP2 and R9 -- all volatile and not holding
   // return values.
-  __ EnterSafepoint(/*scratch=*/R8);
+  __ EnterSafepoint(/*scratch=*/R9);
 
   // Pop LR and THR from the real stack (CSP).
   __ ldp(THR, LR, Address(CSP, 2 * target::kWordSize, Address::PairPostIndex));

runtime/vm/constants_arm.h

@@ -285,11 +285,11 @@ extern const char* fpu_d_reg_names[kNumberOfDRegisters];
 // Register aliases.
 const Register TMP = IP;            // Used as scratch register by assembler.
 const Register TMP2 = kNoRegister;  // There is no second assembler temporary.
-const Register PP = R5;     // Caches object pool pointer in generated code.
+const Register PP = R5;  // Caches object pool pointer in generated code.
 const Register DISPATCH_TABLE_REG = NOTFP;  // Dispatch table register.
-const Register SPREG = SP;  // Stack pointer register.
-const Register FPREG = FP;  // Frame pointer register.
-const Register LRREG = LR;  // Link register.
+const Register SPREG = SP;                  // Stack pointer register.
+const Register FPREG = FP;                  // Frame pointer register.
+const Register LRREG = LR;                  // Link register.
 const Register ARGS_DESC_REG = R4;
 const Register CODE_REG = R6;
 const Register THR = R10;  // Caches current thread in generated code.
@@ -453,6 +453,7 @@ class CallingConventions {
   static const intptr_t kArgumentRegisters = kAbiArgumentCpuRegs;
   static const Register ArgumentRegisters[];
   static const intptr_t kNumArgRegs = 4;
+  static const Register kPointerToReturnStructRegister = R0;
 
   static const intptr_t kFpuArgumentRegisters = 0;
 
@@ -498,6 +499,10 @@ class CallingConventions {
   static constexpr Register kSecondNonArgumentRegister = R9;
   static constexpr Register kFirstCalleeSavedCpuReg = R4;
   static constexpr Register kStackPointerRegister = SPREG;
+
+  COMPILE_ASSERT(
+      ((R(kFirstNonArgumentRegister) | R(kSecondNonArgumentRegister)) &
+       (kArgumentRegisters | R(kPointerToReturnStructRegister))) == 0);
 };
 
 #undef R
@@ -974,7 +979,7 @@ float ReciprocalStep(float op1, float op2);
 float ReciprocalSqrtEstimate(float op);
 float ReciprocalSqrtStep(float op1, float op2);
 
-constexpr uword kBreakInstructionFiller = 0xE1200070;  // bkpt #0
+constexpr uword kBreakInstructionFiller = 0xE1200070;   // bkpt #0
 constexpr uword kDataMemoryBarrier = 0xf57ff050 | 0xb;  // dmb ish
 
 }  // namespace dart

runtime/vm/constants_arm64.h

@@ -308,6 +308,10 @@ class CallingConventions {
   static const intptr_t kArgumentRegisters = kAbiArgumentCpuRegs;
   static const Register ArgumentRegisters[];
   static const intptr_t kNumArgRegs = 8;
+  // The native ABI uses R8 to pass the pointer to the memory preallocated for
+  // struct return values. Arm64 is the only ABI in which this pointer is _not_
+  // in ArgumentRegisters[0] or on the stack.
+  static const Register kPointerToReturnStructRegister = R8;
 
   static const FpuRegister FpuArgumentRegisters[];
   static const intptr_t kFpuArgumentRegisters =
@@ -350,9 +354,13 @@ class CallingConventions {
   static constexpr FpuRegister kReturnFpuReg = V0;
 
   static constexpr Register kFirstCalleeSavedCpuReg = kAbiFirstPreservedCpuReg;
-  static constexpr Register kFirstNonArgumentRegister = R8;
-  static constexpr Register kSecondNonArgumentRegister = R9;
+  static constexpr Register kFirstNonArgumentRegister = R9;
+  static constexpr Register kSecondNonArgumentRegister = R10;
   static constexpr Register kStackPointerRegister = SPREG;
+
+  COMPILE_ASSERT(
+      ((R(kFirstNonArgumentRegister) | R(kSecondNonArgumentRegister)) &
+       (kArgumentRegisters | R(kPointerToReturnStructRegister))) == 0);
 };
 
 #undef R

runtime/vm/constants_ia32.h

@@ -215,6 +215,7 @@ class CallingConventions {
   static const intptr_t kArgumentRegisters = 0;
   static const intptr_t kFpuArgumentRegisters = 0;
   static const intptr_t kNumArgRegs = 0;
+  static const Register kPointerToReturnStructRegister = kNoRegister;
 
   static const XmmRegister FpuArgumentRegisters[];
   static const intptr_t kXmmArgumentRegisters = 0;

runtime/vm/constants_x64.h

@@ -271,6 +271,7 @@ class CallingConventions {
   static const intptr_t kFpuArgumentRegisters =
       R(XMM0) | R(XMM1) | R(XMM2) | R(XMM3);
   static const intptr_t kNumFpuArgRegs = 4;
+  static const intptr_t kPointerToReturnStructRegister = kArg1Reg;
 
   // can ArgumentRegisters[i] and XmmArgumentRegisters[i] both be used at the
   // same time? (Windows no, rest yes)
@@ -330,6 +331,7 @@ class CallingConventions {
                                              R(kArg3Reg) | R(kArg4Reg) |
                                              R(kArg5Reg) | R(kArg6Reg);
   static const intptr_t kNumArgRegs = 6;
+  static const Register kPointerToReturnStructRegister = kArg1Reg;
 
   static const XmmRegister FpuArgumentRegisters[];
   static const intptr_t kFpuArgumentRegisters = R(XMM0) | R(XMM1) | R(XMM2) |
@@ -394,9 +396,9 @@ class CallingConventions {
 
   COMPILE_ASSERT(((R(kFirstCalleeSavedCpuReg)) & kCalleeSaveCpuRegisters) != 0);
 
-  COMPILE_ASSERT(((R(kFirstNonArgumentRegister) |
-                   R(kSecondNonArgumentRegister)) &
-                  kArgumentRegisters) == 0);
+  COMPILE_ASSERT(
+      ((R(kFirstNonArgumentRegister) | R(kSecondNonArgumentRegister)) &
+       (kArgumentRegisters | R(kPointerToReturnStructRegister))) == 0);
 };
 
 #undef R