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Dec 10, 2018
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e5c2fea
uart fixes and BW improvements
d-a-v Apr 4, 2018
f79bc90
uart: read_char straightly use hw buffer
d-a-v Apr 5, 2018
45e2bd5
+attributes for functions called by ISR
d-a-v Apr 5, 2018
974b758
uart: BW improvements
d-a-v Apr 4, 2018
3eb8c95
Merge branch 'master' into serialagain
devyte Apr 9, 2018
0aefb09
Merge branch 'master' into serialagain
devyte Jun 7, 2018
4c6bab4
Merge branch 'master' into serialagain
devyte Jul 3, 2018
3c1e312
Merge branch 'master' into serialagain
d-a-v Nov 30, 2018
132f7f3
Merge branch 'serialagain' of github.com:d-a-v/Arduino into serialagain
d-a-v Nov 30, 2018
6560ab8
fix merge
d-a-v Nov 30, 2018
ebdf57a
Merge branch 'master' into serialagain
d-a-v Dec 5, 2018
c68d474
fix buffer overflow
d-a-v Dec 5, 2018
ff63718
serial stress test sketch
d-a-v Dec 5, 2018
40f237f
astyle
d-a-v Dec 5, 2018
d6316aa
Merge branch 'serialagain' of github.com:d-a-v/Arduino into serialagain
d-a-v Dec 5, 2018
3428144
serial stress example: interactive keyboard, stop reading, overrun
d-a-v Dec 5, 2018
684879d
Merge branch 'master' into serialagain
d-a-v Dec 6, 2018
882989e
serial device test: bandwidth & overrun
d-a-v Dec 6, 2018
3ec2a60
update + HardwareSerial::hasError()
d-a-v Dec 6, 2018
a38f9d8
interactive overrun in example
d-a-v Dec 6, 2018
6b77715
astyle
d-a-v Dec 6, 2018
b639261
Test using @plerup's SoftwareSerial as submodule (tag 3.4.1)
d-a-v Dec 6, 2018
40d1237
update upstream ref (fix warning)
d-a-v Dec 6, 2018
64f7ac1
Merge branch 'master' into serialagain
d-a-v Dec 6, 2018
c48b54f
host mock uart/read(buf,size)
d-a-v Dec 6, 2018
18a189f
reset style changes in submodules before style diff
d-a-v Dec 7, 2018
ddcd908
Merge branch 'serialagain' of github.com:d-a-v/Arduino into serialagain
d-a-v Dec 7, 2018
48ad6bc
Merge branch 'master' into serialagain
earlephilhower Dec 7, 2018
0a7322f
Merge branch 'master' into serialagain
devyte Dec 8, 2018
fb25c8d
update build_boards_manager_package.sh for submodules
d-a-v Dec 8, 2018
8785e3a
Merge branch 'master' into serialagain
d-a-v Dec 8, 2018
e83316f
Merge branch 'master' into serialagain
devyte Dec 9, 2018
62ead27
Merge branch 'master' into serialagain
devyte Dec 9, 2018
c7eba46
Merge branch 'master' into serialagain
devyte Dec 10, 2018
cbd8b44
trigger CI (removing space)
d-a-v Dec 10, 2018
99fcfda
cannot reproduce locally the CI issue, setting bash -x option to get …
d-a-v Dec 10, 2018
6234fe0
remove previously added (in this PR) 'set -e' in package builder (pas…
d-a-v Dec 10, 2018
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8 changes: 8 additions & 0 deletions cores/esp8266/HardwareSerial.h
Original file line number Diff line number Diff line change
Expand Up @@ -128,6 +128,14 @@ class HardwareSerial: public Stream
// this may return -1, but that's okay
return uart_read_char(_uart);
}
size_t readBytes(char* buffer, size_t size) override
{
return uart_read(_uart, buffer, size);
}
size_t readBytes(uint8_t* buffer, size_t size) override
{
return uart_read(_uart, (char*)buffer, size);
}
int availableForWrite(void)
{
return static_cast<int>(uart_tx_free(_uart));
Expand Down
89 changes: 71 additions & 18 deletions cores/esp8266/uart.c
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,6 @@
#include "esp8266_peri.h"
#include "user_interface.h"

const char overrun_str [] ICACHE_RODATA_ATTR STORE_ATTR = "uart input full!\r\n";
static int s_uart_debug_nr = UART0;


Expand Down Expand Up @@ -83,7 +82,8 @@ struct uart_



inline size_t
// called by ISR
inline size_t ICACHE_RAM_ATTR
uart_rx_fifo_available(const int uart_nr)
{
return (USS(uart_nr) >> USRXC) & 0xFF;
Expand All @@ -108,11 +108,11 @@ uart_rx_available_unsafe(uart_t* uart)
return uart_rx_buffer_available_unsafe(uart->rx_buffer) + uart_rx_fifo_available(uart->uart_nr);
}


//#define UART_DISCARD_NEWEST

// Copy all the rx fifo bytes that fit into the rx buffer
inline void
// called by ISR
inline void ICACHE_RAM_ATTR
uart_rx_copy_fifo_to_buffer_unsafe(uart_t* uart)
{
struct uart_rx_buffer_ *rx_buffer = uart->rx_buffer;
Expand All @@ -122,12 +122,7 @@ uart_rx_copy_fifo_to_buffer_unsafe(uart_t* uart)
size_t nextPos = (rx_buffer->wpos + 1) % rx_buffer->size;
if(nextPos == rx_buffer->rpos)
{

if (!uart->overrun)
{
uart->overrun = true;
os_printf_plus(overrun_str);
}
uart->overrun = true;

// a choice has to be made here,
// do we discard newest or oldest data?
Expand Down Expand Up @@ -156,20 +151,33 @@ uart_peek_char_unsafe(uart_t* uart)

//without the following if statement and body, there is a good chance of a fifo overrun
if (uart_rx_buffer_available_unsafe(uart->rx_buffer) == 0)
// hw fifo can't be peeked, data need to be copied to sw
uart_rx_copy_fifo_to_buffer_unsafe(uart);

return uart->rx_buffer->buffer[uart->rx_buffer->rpos];
}

inline int
// taking data straight from hw fifo: loopback-test BW jumps by 19%
inline int
uart_read_char_unsafe(uart_t* uart)
{
int data = uart_peek_char_unsafe(uart);
if(data != -1)
if (uart_rx_buffer_available_unsafe(uart->rx_buffer))
{
// take oldest sw data
int ret = uart->rx_buffer->buffer[uart->rx_buffer->rpos];
uart->rx_buffer->rpos = (uart->rx_buffer->rpos + 1) % uart->rx_buffer->size;
return data;
}
return ret;
}

if (uart_rx_fifo_available(uart->uart_nr))
{
// no sw data, take from hw fifo
return USF(uart->uart_nr);
}

// unavailable
return -1;
}

/**********************************************************/

Expand Down Expand Up @@ -212,6 +220,44 @@ uart_read_char(uart_t* uart)
return data;
}

// loopback-test BW jumps by 190%
size_t
uart_read(uart_t* uart, char* userbuffer, size_t usersize)
{
if(uart == NULL || !uart->rx_enabled)
return -1;

size_t ret = 0;
ETS_UART_INTR_DISABLE();

while (ret < usersize && uart_rx_available_unsafe(uart))
{
if (!uart_rx_buffer_available_unsafe(uart->rx_buffer))
{
// no more data in sw buffer, take them from hw fifo
while (ret < usersize && uart_rx_fifo_available(uart->uart_nr))
userbuffer[ret++] = USF(uart->uart_nr);

// no more sw/hw data available
break;
}

// pour sw buffer to user's buffer
// get largest linear length from sw buffer
size_t chunk = uart->rx_buffer->rpos < uart->rx_buffer->wpos?
uart->rx_buffer->wpos - uart->rx_buffer->rpos:
uart->rx_buffer->size - uart->rx_buffer->rpos;
if (ret + chunk > usersize)
chunk = usersize - ret;
memcpy(userbuffer + ret, uart->rx_buffer->buffer + uart->rx_buffer->rpos, chunk);
uart->rx_buffer->rpos = (uart->rx_buffer->rpos + chunk) % uart->rx_buffer->size;
ret += chunk;
}

ETS_UART_INTR_ENABLE();
return ret;
}

size_t
uart_resize_rx_buffer(uart_t* uart, size_t new_size)
{
Expand Down Expand Up @@ -252,7 +298,7 @@ uart_isr(void * arg)
ETS_UART_INTR_DISABLE();
return;
}
if(USIS(uart->uart_nr) & ((1 << UIFF) | (1 << UITO)))
if(USIS(uart->uart_nr) & (1 << UIFF))
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I don't understand this code change. Could you please add comments to explain this new condition?

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I dont understand why this flag (UITO = RX FIFO timeout) triggers buffer copy, it has nothing to do. It is the role of UIFF alone (hw-rx-fifo full of 100 chars trigger).
What this interrupt could trigger is a flag in our future global sanity register stating that there are decoding error on the uart line.

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Doesn't UITO trigger when the RX FIFO is not empty, but also not "full" and some time has passed. That would be used in simpler libraries that only allowed access to the software buffer and needed the ISR to copy them over.

uart_rx_copy_fifo_to_buffer_unsafe(uart);

USIC(uart->uart_nr) = USIS(uart->uart_nr);
Expand All @@ -268,9 +314,16 @@ uart_start_isr(uart_t* uart)
// triggers the IRS very often. A value of 127 would not leave much time
// for ISR to clear fifo before the next byte is dropped. So pick a value
// in the middle.
USC1(uart->uart_nr) = (100 << UCFFT) | (0x02 << UCTOT) | (1 <<UCTOE );
// update: with direct peeking and loopback test @ 3Mbauds/8n1 (=2343Kibits/s):
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I don't understand the code changes below, or this explanation. Considering that you seem to have investigated this in detail, could you please explain the new code, and the meaning of the registers? (future reference)

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These are the UITO's brothers above. I will reenable them but treat the interrupt differently.

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error interrupts are now managed, Serial.hasRxError() tells if receive error occured.

// when high, allows to directly peek into hw buffer, avoiding two copies
// - 4..120 give 2300Kibits/s
// - 1, 2, 3 are below
// - far below 2000 without direct peeking
#define INTRIGGER 100

USC1(uart->uart_nr) = (INTRIGGER << UCFFT);
USIC(uart->uart_nr) = 0xffff;
USIE(uart->uart_nr) = (1 << UIFF) | (1 << UIFR) | (1 << UITO);
USIE(uart->uart_nr) = (1 << UIFF);
ETS_UART_INTR_ATTACH(uart_isr, (void *)uart);
ETS_UART_INTR_ENABLE();
}
Expand Down
1 change: 1 addition & 0 deletions cores/esp8266/uart.h
Original file line number Diff line number Diff line change
Expand Up @@ -131,6 +131,7 @@ size_t uart_write_char(uart_t* uart, char c);
size_t uart_write(uart_t* uart, const char* buf, size_t size);
int uart_read_char(uart_t* uart);
int uart_peek_char(uart_t* uart);
size_t uart_read(uart_t* uart, char* buffer, size_t size);
size_t uart_rx_available(uart_t* uart);
size_t uart_tx_free(uart_t* uart);
void uart_wait_tx_empty(uart_t* uart);
Expand Down