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[SYCL] Enable parallel indexers for AMD, after adding global offset #941
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sergey-semenov
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Mar 23, 2022
pvchupin
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May 5, 2022
The purpose of this patch is to generalize SYCL global offset pass and enable it for AMDGPU. * enable global offset in AMD's HIP * decorate SYCL kernel with dedicated MDNode: This removes the need for command line options added by the SYCL driver, discussed here: [SYCL] Generalize local accessor to shared mem pass #5149 (comment) * extract common helpers for local accessor and global offset passes * generalize the pass * introduce builtin_amdgcn_implicit_offset and enable the pass for ADMGPU * implement spirv_GlobalOffset_[x,y,z] * update the docs The main deviation from the NVPTX is the need for supporting address spaces. For AMD kernel arguments reside in constant address space, which for the case with offset forces a copy to private AS, in order to keep the call-graph interface coherent (we can't allocate const address space for the case without offset). Corresponding test-suit PR: intel/llvm-test-suite#941
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This can now be closed, with b40d1e3 in. |
myler
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Jun 17, 2022
myler
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Jun 17, 2022
…_delete [ESIMD] Delete the old versions of LIT tests for LSC load/stores
aelovikov-intel
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Mar 27, 2023
… global offset (intel/llvm-test-suite#934)" (intel/llvm-test-suite#940)" (intel/llvm-test-suite#941) This reverts commit 0259e6a.
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Must be reapplied after intel/llvm#5855