[CI] Disable E2E tests failing on PVC (#14720)

This PR disable tests failing on PVC.
GH issue to track disabled tests:
#14826

Author: uditagarwal97

sycl/test-e2e/Basic/accessor/accessor.cpp

@@ -1,6 +1,9 @@
 // RUN: %{build} -DSYCL2020_DISABLE_DEPRECATION_WARNINGS -o %t.out
 // RUN: %{run} %t.out
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
+
 //==----------------accessor.cpp - SYCL accessor basic test ----------------==//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.

sycl/test-e2e/Basic/accessor/host_task_accessor_deduction.cpp

@@ -1,2 +1,6 @@
 // RUN: %{build} -Daccessor_new_api_test %S/Inputs/host_task_accessor.cpp -o %t.out
 // RUN: %{run} %t.out
+
+// Disabled on PVC without igc-dev due to timeout.
+// https://github.com/intel/llvm/issues/14826
+// UNSUPPORTED: arch-intel_gpu_pvc && !igc-dev

sycl/test-e2e/DeprecatedFeatures/set_arg_interop.cpp

@@ -1,5 +1,8 @@
 // REQUIRES: opencl, opencl_icd
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
+
 // RUN: %{build} -D__SYCL_INTERNAL_API -o %t.out %opencl_lib -O3
 // RUN: %{run} %t.out
 

sycl/test-e2e/DeviceArchitecture/device_architecture_comparison_on_device_aot.cpp

@@ -1,4 +1,8 @@
 // REQUIRES: arch-intel_gpu_pvc, ocloc
+
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
+
 // RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_pvc %s -o %t.out
 // RUN: %{run} %t.out
 

sycl/test-e2e/DeviceCodeSplit/grf.cpp

@@ -14,6 +14,9 @@
 //   compiler option
 
 // REQUIRES: arch-intel_gpu_pvc
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: *
+
 // RUN: %{build} -o %t.out
 // Don't use SYCL_UR_TRACE as the output from the L0 adapter logging interferes
 // with the regular UR traces we are checking.

sycl/test-e2e/ESIMD/lit.local.cfg

@@ -10,7 +10,11 @@ if 'gpu-intel-gen9' in config.available_features and platform.system() == 'Windo
 # The current DG2 postcommit job only runs L0 anyway,
 # so there's no difference in coverage.
 # We should investigate why OCL fails separately.
-if 'gpu-intel-dg2' in config.available_features:
+
+# Check if any device has arch-intel_gpu_pvc
+has_arch_gpu_intel_pvc = any('arch-intel_gpu_pvc' in T for T in config.sycl_dev_features.values())
+
+if 'gpu-intel-dg2' in config.available_features or has_arch_gpu_intel_pvc:
   config.required_features += ['level_zero']
 
 # TODO: Remove this once the warnings are resolved

sycl/test-e2e/ESIMD/mask_expand_load.cpp

@@ -9,6 +9,9 @@
 // RUN: %{build} -fsycl-device-code-split=per_kernel -o %t.out
 // RUN: %{run} %t.out
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
+
 // This is a basic test to validate the expanded load API.
 
 #include "esimd_test_utils.hpp"

sycl/test-e2e/ESIMD/named_barriers/loop.cpp

@@ -9,7 +9,11 @@
 // REQUIRES: arch-intel_gpu_pvc
 // RUN: %{build} -o %t.out
 // RUN: %{run} %t.out
-//
+
+// Disabled on PVC without igc-dev due to flaky failures.
+// https://github.com/intel/llvm/issues/14826
+// UNSUPPORTED: arch-intel_gpu_pvc && !igc-dev
+
 // Test checks support of named barrier in a loop in ESIMD kernel.
 // SLM and surface size is 32 bytes, 16 bytes per iteration.
 // Each iteration has 1 barrier and 1 producer. Producer stores data to SLM,

sycl/test-e2e/ESIMD/named_barriers/loop_extended.cpp

@@ -10,7 +10,10 @@
 // RUN: %{build} -o %t.out
 // RUN: %{run} %t.out
 
-//
+// Disabled on PVC due to flaky failures.
+// https://github.com/intel/llvm/issues/14826
+// UNSUPPORTED: arch-intel_gpu_pvc
+
 // Test checks support of named barrier in a loop in ESIMD kernel.
 // First iteration has 1 barrier and 1 producer, second - 2 barriers and 2
 // producers. Producer stores data to SLM, then all threads read SLM and store

sycl/test-e2e/Graph/Explicit/interop-level-zero-launch-kernel.cpp

@@ -9,6 +9,9 @@
 // Extra run to check for immediate-command-list in Level Zero
 // RUN: %if level_zero %{env SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=1 %{l0_leak_check} %{run} %t.out %S/../Inputs/Kernels/saxpy.spv 2>&1 | FileCheck %s --implicit-check-not=LEAK %}
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
+
 #define GRAPH_E2E_EXPLICIT
 
 #include "../Inputs/interop-level-zero-launch-kernel.cpp"

sycl/test-e2e/Graph/RecordReplay/interop-level-zero-launch-kernel.cpp

@@ -9,6 +9,9 @@
 // Extra run to check for immediate-command-list in Level Zero
 // RUN: %if level_zero %{env SYCL_PI_LEVEL_ZERO_USE_IMMEDIATE_COMMANDLISTS=1 %{l0_leak_check} %{run} %t.out %S/../Inputs/Kernels/saxpy.spv 2>&1 | FileCheck %s --implicit-check-not=LEAK %}
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
+
 #define GRAPH_E2E_RECORD_REPLAY
 
 #include "../Inputs/interop-level-zero-launch-kernel.cpp"

sycl/test-e2e/GroupAlgorithm/reduce_sycl2020.cpp

@@ -1,6 +1,10 @@
 // RUN: %{build} -fsycl-device-code-split=per_kernel -I . -o %t.out
 // RUN: %{run} %t.out
 
+// Disabled on PVC without igc-dev due to timeout.
+// https://github.com/intel/llvm/issues/14826
+// UNSUPPORTED: arch-intel_gpu_pvc && !igc-dev
+
 #include "support.h"
 #include <algorithm>
 #include <cassert>

sycl/test-e2e/KernelAndProgram/target_register_alloc_mode.cpp

@@ -1,5 +1,8 @@
 // REQUIRES: arch-intel_gpu_pvc
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
+
 // RUN: %{build} -ftarget-register-alloc-mode=pvc:auto -o %t_with.out
 // RUN: %{build} -o %t_without.out
 // RUN: %{build} -ftarget-register-alloc-mode=pvc:default -o %t_default.out

sycl/test-e2e/KernelCompiler/kernel_compiler_sycl.cpp

@@ -8,6 +8,9 @@
 
 // REQUIRES: (opencl || level_zero)
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc && igc-dev
+
 // RUN: %{build} -o %t.out
 // RUN: %{run} %t.out
 

sycl/test-e2e/Matrix/SG32/get_coord_int8_matB.cpp

@@ -8,7 +8,7 @@
 // SG size = 32 is not currently supported for SYCL Joint Matrix by IGC on DG2
 // UNSUPPORTED: gpu-intel-dg2
 // REQUIRES: aspect-ext_intel_matrix
-// REQUIRES-INTEL-DRIVER: lin: 27501, win: 101.4943
+// REQUIRES-INTEL-DRIVER: lin: 30049, win: 101.4943
 
 // RUN: %{build} -o %t.out
 // RUN: %{run} %t.out

sycl/test-e2e/Matrix/SPVCooperativeMatrix/joint_matrix_bf16_fill_k_cache_OOB.cpp

@@ -8,6 +8,9 @@
 // REQUIRES: aspect-ext_intel_matrix, gpu
 // UNSUPPORTED: gpu-intel-dg2
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc && igc-dev
+
 // RUN: %{build} -D__SPIRV_USE_COOPERATIVE_MATRIX -o %t_gpu_vnni.out -ffp-model=precise -DOOB -DVNNI
 // RUN: %{run} %t_gpu_vnni.out
 

sycl/test-e2e/Matrix/SPVCooperativeMatrix/joint_matrix_prefetch.cpp

@@ -10,6 +10,8 @@
 // RUN: %{run} %t.out
 
 // XFAIL: cpu
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc && !dev-igc
 
 #include "../common.hpp"
 

sycl/test-e2e/Matrix/element_wise_all_ops_1d.cpp

@@ -6,6 +6,7 @@
 //
 //===----------------------------------------------------------------------===//
 // REQUIRES: aspect-ext_intel_matrix, gpu
+// REQUIRES-INTEL-DRIVER: lin: 30049
 
 // RUN: %{build} -o %t.out
 // RUN: env IGC_JointMatrixLoadStoreOpt=1 %{run} %t.out

sycl/test-e2e/Matrix/element_wise_all_ops_1d_cont.cpp

@@ -6,6 +6,7 @@
 //
 //===----------------------------------------------------------------------===//
 // REQUIRES: aspect-ext_intel_matrix, gpu
+// REQUIRES-INTEL-DRIVER: lin: 30049
 
 // RUN: %{build} -o %t.out
 // RUN: env IGC_JointMatrixLoadStoreOpt=2 %{run} %t.out

sycl/test-e2e/Matrix/element_wise_all_ops_scalar.cpp

@@ -6,6 +6,7 @@
 //
 //===----------------------------------------------------------------------===//
 // REQUIRES: aspect-ext_intel_matrix, gpu
+// REQUIRES-INTEL-DRIVER: lin: 30049
 
 // RUN: %{build} -o %t.out
 // RUN: env IGC_JointMatrixLoadStoreOpt=0 %{run} %t.out

sycl/test-e2e/Matrix/get_coord_int8_matB.cpp

@@ -9,6 +9,7 @@
 
 // RUN: %{build} -o %t.out
 // RUN: %{run} %t.out
+// REQUIRES-INTEL-DRIVER: lin: 30049
 
 #include "common.hpp"
 #include "get_coord_int8_matB_impl.hpp"

sycl/test-e2e/Matrix/joint_matrix_bf16_fill_k_cache_OOB.cpp

@@ -8,6 +8,9 @@
 // REQUIRES: aspect-ext_intel_matrix, gpu
 // UNSUPPORTED: gpu-intel-dg2
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc && igc-dev
+
 // RUN: %{build} -o %t_gpu_vnni.out -ffp-model=precise -DOOB -DVNNI
 // RUN: %{run} %t_gpu_vnni.out
 

sycl/test-e2e/Matrix/joint_matrix_bf16_fill_k_cache_prefetch.cpp

@@ -19,5 +19,8 @@
 // This test will be adjusted to run on the CPU
 // XFAIL:cpu
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc && !igc-dev
+
 #include "common.hpp"
 #include "joint_matrix_bf16_fill_k_cache_impl.hpp"

sycl/test-e2e/Matrix/joint_matrix_prefetch.cpp

@@ -9,6 +9,9 @@
 // RUN: %{build} -o %t.out
 // RUN: %{run} %t.out
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc && !igc-dev
+
 #include "common.hpp"
 
 constexpr size_t TN = 16;

sycl/test-e2e/Matrix/joint_matrix_rowmajorA_rowmajorB.cpp

@@ -8,6 +8,7 @@
 // REQUIRES: aspect-ext_intel_matrix
 // VNNI transform is not supported yet by IGC on DG2
 // UNSUPPORTED: gpu-intel-dg2
+// REQUIRES-INTEL-DRIVER: lin: 30049
 
 // RUN: %{build} -o %t.out
 // RUN: %{run} %t.out

sycl/test-e2e/Plugin/level_zero_ext_intel_cslice.cpp

@@ -1,6 +1,8 @@
 // REQUIRES: level_zero
 // REQUIRES: aspect-ext_intel_device_id
 // UNSUPPORTED: gpu-intel-pvc-1T
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
 
 // RUN: %{build} -Wno-error=deprecated-declarations -o %t.out
 

sycl/test-e2e/Plugin/level_zero_ext_intel_queue_index.cpp

@@ -1,6 +1,9 @@
 // REQUIRES: aspect-ext_intel_device_id
 // REQUIRES: level_zero
 // UNSUPPORTED: gpu-intel-pvc-1T
+
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
 // RUN: %{build} -o %t.out
 
 // TODO: at this time PVC 1T systems are not correctly supporting CSLICE

sycl/test-e2e/Plugin/level_zero_sub_sub_device.cpp

@@ -1,5 +1,7 @@
 // REQUIRES:  arch-intel_gpu_pvc, level_zero
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
 // UNSUPPORTED: gpu-intel-pvc-1T
 
 // RUN: %{build} %level_zero_options -o %t.out

sycl/test-e2e/syclcompat/launch/launch_policy_lmem.cpp

@@ -20,6 +20,9 @@
  *     launch<F> with policy & use local memory tests
  **************************************************************************/
 
+// https://github.com/intel/llvm/issues/14826
+// XFAIL: arch-intel_gpu_pvc
+
 // RUN: %{build} -fsycl-device-code-split=per_kernel -o %t.out
 // RUN: %{run} %t.out