-
Notifications
You must be signed in to change notification settings - Fork 768
Ptxas: unresolved extern function __spirv_AtomicLoad(long long const*...) #7658
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Comments
Hi @12VIP thanks for reporting this issue. We will look into this and get back to you shortly. Would be helpful if you could share the related code to reproduce the issue. |
Quick look on the error message: the reason the compilation failed is that CUDA doesn't support SPIR-V. |
CUDA doesn't use SPIR-V, so I don't think this is the right guess. I suppose it has something to do with the libclc implementation, which is supposed to implement this function. The reason why this function definition is missing might be that |
files.zip : Attached cpp file & headers if required. |
@12VIP |
@zjin-lcf , Original code : https://github.com/OPM/LBPM/blob/master/tests/TestFluxBC.cpp |
@12VIP I wasn't able to build your example (as attached in files.zip) due to broken dependencies, it would be great if you could provide us with a minimal SYCL example that exhibits the same issue. Recently we have merged in fixes to re-mangler, which might be of help in that case (as long long would likely be requiring re-mangline), further more I suggest you try this PR: #7391 as it introduces more support for generic address space atomics. |
In fact I've just had a look in the generated libclc files (from that PR I've mentioned above) and indeed it contains the function in question:
|
The diffs are quite hard to follow, but in an essence this patch brings: * a new entry, implementing a generic address space for multiple `__CLC_NVVM_ATOMIC_XYZ_IMPL`, where `XYZ` stands for `CAS`, `INDEC`, `LOAD`, `MAX`, `MIN`, `STORE` and `SUB`, * fixes the name of mangled function that the IMPL uses, * the rest is just formatting to 80 chars. This patch supersedes: #5849 but it requires the fixes to the remangler from: #7220 Fixes: #7658
Issue (ptxas error) observed while building sample application(after dpct migration)
In this case :
During compilation phase object file TestFluxBC.cpp.dp.o is generated then ,during linking phase :
command :
dpcpp_compiler/bin/clang++ -fsycl -fsycl-targets=nvptx64-nvidia-cuda -o TestFluxBC tests/TestFluxBC.cpp.dp.o liblbpm-wia.a -L/usr/lib/x86_64-linux-gnu/openmpi/lib -lmpi_cxx -lmpi
Error Reported:
ptxas fatal : Unresolved extern function '_Z18__spirv_AtomicLoadPKxN5__spv5Scope4FlagENS_19MemorySemanticsMask4FlagE'
llvm-foreach:
ptxas fatal : Unresolved extern function '_Z18__spirv_AtomicLoadPKxN5__spv5Scope4FlagENS_19MemorySemanticsMask4FlagE'
llvm-foreach:
clang++: error: ptxas command failed with exit code 255 (use -v to see invocation)
clang version 16.0.0 (/netbatch/donb3373736_00/runDir/jenkins-dir/workspace/Tools_SH/SYCLOS_Nightly/RHEL/llvm.src/clang 2359d94)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: sycl_nightly_20221203/dpcpp_compiler/bin
clang++: note: diagnostic msg: Error generating preprocessed source(s).
Function :
c++filt '_Z18__spirv_AtomicLoadPKxN5__spv5Scope4FlagENS_19MemorySemanticsMask4FlagE'
__spirv_AtomicLoad(long long const*, __spv::Scope::Flag, long long const::MemorySemanticsMask::Flag)
Will try to check on the reproducer steps(as lots of steps prerequisite) .Want to check if this is some known issue .
The text was updated successfully, but these errors were encountered: