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[CIR][CIRGen][Builtin][Neon] Lower vrnd64z and vrnd64zq
1 parent 60126e9 commit a92f984

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2 files changed

+48
-18
lines changed

2 files changed

+48
-18
lines changed

clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

+8-6
Original file line numberDiff line numberDiff line change
@@ -2627,6 +2627,14 @@ mlir::Value CIRGenFunction::emitCommonNeonBuiltinExpr(
26272627
argTypes.push_back(vTy);
26282628
break;
26292629
}
2630+
case NEON::BI__builtin_neon_vrnd64z_f32:
2631+
case NEON::BI__builtin_neon_vrnd64zq_f32:
2632+
case NEON::BI__builtin_neon_vrnd64z_f64:
2633+
case NEON::BI__builtin_neon_vrnd64zq_f64: {
2634+
intrincsName = "aarch64.neon.frint64z";
2635+
argTypes.push_back(vTy);
2636+
break;
2637+
}
26302638
case NEON::BI__builtin_neon_vshl_v:
26312639
case NEON::BI__builtin_neon_vshlq_v: {
26322640
return builder.create<cir::ShiftOp>(
@@ -4206,12 +4214,6 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
42064214
case NEON::BI__builtin_neon_vrnd64xq_f64: {
42074215
llvm_unreachable("NEON::BI__builtin_neon_vrnd64xq_f64 NYI");
42084216
}
4209-
case NEON::BI__builtin_neon_vrnd64z_f32:
4210-
case NEON::BI__builtin_neon_vrnd64zq_f32:
4211-
case NEON::BI__builtin_neon_vrnd64z_f64:
4212-
case NEON::BI__builtin_neon_vrnd64zq_f64: {
4213-
llvm_unreachable("NEON::BI__builtin_neon_vrnd64zq_f64 NYI");
4214-
}
42154217
case NEON::BI__builtin_neon_vrnd_v:
42164218
case NEON::BI__builtin_neon_vrndq_v: {
42174219
llvm_unreachable("NEON::BI__builtin_neon_vrndq_v NYI");

clang/test/CIR/CodeGen/AArch64/v8.5a-neon-frint3264-intrinsic.c

+40-12
Original file line numberDiff line numberDiff line change
@@ -73,16 +73,30 @@ float32x4_t test_vrnd32xq_f32(float32x4_t a) {
7373
// CHECK-LABEL: test_vrnd64z_f32
7474
// CHECK: [[RND:%.*]] = call <2 x float> @llvm.aarch64.neon.frint64z.v2f32(<2 x float> %a)
7575
// CHECK: ret <2 x float> [[RND]]
76-
// float32x2_t test_vrnd64z_f32(float32x2_t a) {
77-
// return vrnd64z_f32(a);
78-
// }
76+
float32x2_t test_vrnd64z_f32(float32x2_t a) {
77+
return vrnd64z_f32(a);
78+
79+
// CIR-LABEL: vrnd64z_f32
80+
// CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.frint64z" {{.*}} : (!cir.vector<!cir.float x 2>) -> !cir.vector<!cir.float x 2>
81+
82+
// LLVM-LABEL: @test_vrnd64z_f32
83+
// LLVM: [[RND:%.*]] = call <2 x float> @llvm.aarch64.neon.frint64z.v2f32(<2 x float> %0)
84+
// LLVM: ret <2 x float> [[RND]]
85+
}
7986

8087
// CHECK-LABEL: test_vrnd64zq_f32
8188
// CHECK: [[RND:%.*]] = call <4 x float> @llvm.aarch64.neon.frint64z.v4f32(<4 x float> %a)
8289
// CHECK: ret <4 x float> [[RND]]
83-
// float32x4_t test_vrnd64zq_f32(float32x4_t a) {
84-
// return vrnd64zq_f32(a);
85-
// }
90+
float32x4_t test_vrnd64zq_f32(float32x4_t a) {
91+
return vrnd64zq_f32(a);
92+
93+
// CIR-LABEL: vrnd64zq_f32
94+
// CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.frint64z" {{.*}} : (!cir.vector<!cir.float x 4>) -> !cir.vector<!cir.float x 4>
95+
96+
// LLVM-LABEL: @test_vrnd64zq_f32
97+
// LLVM: [[RND:%.*]] = call <4 x float> @llvm.aarch64.neon.frint64z.v4f32(<4 x float> %0)
98+
// LLVM: ret <4 x float> [[RND]]
99+
}
86100

87101
float64x1_t test_vrnd32x_f64(float64x1_t a) {
88102
return vrnd32x_f64(a);
@@ -138,13 +152,27 @@ float64x2_t test_vrnd32xq_f64(float64x2_t a) {
138152
// CHECK-LABEL: test_vrnd64z_f64
139153
// CHECK: [[RND:%.*]] = call <1 x double> @llvm.aarch64.neon.frint64z.v1f64(<1 x double> %a)
140154
// CHECK: ret <1 x double> [[RND]]
141-
// float64x1_t test_vrnd64z_f64(float64x1_t a) {
142-
// return vrnd64z_f64(a);
143-
// }
155+
float64x1_t test_vrnd64z_f64(float64x1_t a) {
156+
return vrnd64z_f64(a);
157+
158+
// CIR-LABEL: vrnd64z_f64
159+
// CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.frint64z" {{.*}} : (!cir.vector<!cir.double x 1>) -> !cir.vector<!cir.double x 1>
160+
161+
// LLVM-LABEL: @test_vrnd64z_f64
162+
// LLVM: [[RND:%.*]] = call <1 x double> @llvm.aarch64.neon.frint64z.v1f64(<1 x double> %0)
163+
// LLVM: ret <1 x double> [[RND]]
164+
}
144165

145166
// CHECK-LABEL: test_vrnd64zq_f64
146167
// CHECK: [[RND:%.*]] = call <2 x double> @llvm.aarch64.neon.frint64z.v2f64(<2 x double> %a)
147168
// CHECK: ret <2 x double> [[RND]]
148-
// float64x2_t test_vrnd64zq_f64(float64x2_t a) {
149-
// return vrnd64zq_f64(a);
150-
// }
169+
float64x2_t test_vrnd64zq_f64(float64x2_t a) {
170+
return vrnd64zq_f64(a);
171+
172+
// CIR-LABEL: vrnd64zq_f64
173+
// CIR: [[TMP0:%.*]] = cir.llvm.intrinsic "aarch64.neon.frint64z" {{.*}} : (!cir.vector<!cir.double x 2>) -> !cir.vector<!cir.double x 2>
174+
175+
// LLVM-LABEL: @test_vrnd64zq_f64
176+
// LLVM: [[RND:%.*]] = call <2 x double> @llvm.aarch64.neon.frint64z.v2f64(<2 x double> %0)
177+
// LLVM: ret <2 x double> [[RND]]
178+
}

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