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[CIR][Bugfix] Use llvm types when creating a LLVM::CallOp #58

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[CIR][Bugfix] Use llvm types when creating a LLVM::CallOp #58

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Stack from ghstack (oldest at bottom):

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Broken ghstack PR. Closing it.

@bcardosolopes bcardosolopes deleted the gh/sitio-couto/18/head branch October 18, 2023 17:44
lanza pushed a commit that referenced this pull request Oct 2, 2024
@ParkHanbum
[AArch64] Replace AND with LSL#2 for LDR target (#34101) (#89531)
77fccb3 
Currently, process of replacing bitwise operations consisting of
`LSR`/`LSL` with `And` is performed by `DAGCombiner`.

However, in certain cases, the `AND` generated by this process
can be removed.

Consider following case:
```
        lsr x8, x8, #56
        and x8, x8, #0xfc
        ldr w0, [x2, x8]
        ret
```

In this case, we can remove the `AND` by changing the target of `LDR`
to `[X2, X8, LSL #2]` and right-shifting amount change to 56 to 58.

after changed:
```
        lsr x8, x8, #58
        ldr w0, [x2, x8, lsl #2]
        ret
```

This patch checks to see if the `SHIFTING` + `AND` operation on load
target can be optimized and optimizes it if it can.
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