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[InstCombine] Handle isNanOrInf idioms (#80414)
This patch folds: ``` (icmp eq (and (bitcast X to int), ExponentMask), ExponentMask) --> llvm.is.fpclass(X, fcInf|fcNan) (icmp ne (and (bitcast X to int), ExponentMask), ExponentMask) --> llvm.is.fpclass(X, ~(fcInf|fcNan)) ``` Alive2: https://alive2.llvm.org/ce/z/_hXAAF
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‎llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp

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@@ -1827,6 +1827,33 @@ Instruction *InstCombinerImpl::foldICmpAndConstConst(ICmpInst &Cmp,
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}
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}
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// (icmp eq (and (bitcast X to int), ExponentMask), ExponentMask) -->
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// llvm.is.fpclass(X, fcInf|fcNan)
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// (icmp ne (and (bitcast X to int), ExponentMask), ExponentMask) -->
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// llvm.is.fpclass(X, ~(fcInf|fcNan))
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Value *V;
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if (!Cmp.getParent()->getParent()->hasFnAttribute(
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Attribute::NoImplicitFloat) &&
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Cmp.isEquality() && match(X, m_OneUse(m_BitCast(m_Value(V))))) {
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Type *SrcType = V->getType();
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Type *DstType = X->getType();
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Type *FPType = SrcType->getScalarType();
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// Make sure the bitcast doesn't change between scalar and vector and
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// doesn't change the number of vector elements.
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if (SrcType->isVectorTy() == DstType->isVectorTy() &&
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SrcType->getScalarSizeInBits() == DstType->getScalarSizeInBits() &&
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FPType->isIEEELikeFPTy() && C1 == *C2) {
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APInt ExponentMask =
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APFloat::getInf(FPType->getFltSemantics()).bitcastToAPInt();
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if (C1 == ExponentMask) {
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unsigned Mask = FPClassTest::fcNan | FPClassTest::fcInf;
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if (isICMP_NE)
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Mask = ~Mask & fcAllFlags;
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return replaceInstUsesWith(Cmp, Builder.createIsFPClass(V, Mask));
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}
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}
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}
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return nullptr;
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}
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‎llvm/test/Transforms/InstCombine/fpclass-check-idioms.ll

Lines changed: 203 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,203 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt -S -passes=instcombine < %s | FileCheck %s
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define i1 @f32_fcnan_fcinf(float %a) {
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; CHECK-LABEL: define i1 @f32_fcnan_fcinf(
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; CHECK-SAME: float [[A:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[A]])
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i32 = bitcast float %a to i32
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%and = and i32 %i32, 2139095040
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%cmp = icmp eq i32 %and, 2139095040
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ret i1 %cmp
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}
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define i1 @f32_not_fcnan_fcinf(float %a) {
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; CHECK-LABEL: define i1 @f32_not_fcnan_fcinf(
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; CHECK-SAME: float [[A:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[A]])
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; CHECK-NEXT: [[CMP:%.*]] = fcmp one float [[TMP1]], 0x7FF0000000000000
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i32 = bitcast float %a to i32
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%and = and i32 %i32, 2139095040
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%cmp = icmp ne i32 %and, 2139095040
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ret i1 %cmp
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}
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define i1 @f64_fcnan_fcinf(double %a) {
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; CHECK-LABEL: define i1 @f64_fcnan_fcinf(
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; CHECK-SAME: double [[A:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.fabs.f64(double [[A]])
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq double [[TMP1]], 0x7FF0000000000000
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i64 = bitcast double %a to i64
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%and = and i64 %i64, 9218868437227405312
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%cmp = icmp eq i64 %and, 9218868437227405312
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ret i1 %cmp
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}
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; TODO: handle more fpclass check idioms
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define i1 @f32_fcinf(float %a) {
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; CHECK-LABEL: define i1 @f32_fcinf(
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; CHECK-SAME: float [[A:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[A]])
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; CHECK-NEXT: [[AND:%.*]] = bitcast float [[TMP1]] to i32
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 2139095040
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i32 = bitcast float %a to i32
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%and = and i32 %i32, 2147483647
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%cmp = icmp eq i32 %and, 2139095040
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ret i1 %cmp
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}
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define i1 @f32_fcnan(float %a) {
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; CHECK-LABEL: define i1 @f32_fcnan(
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; CHECK-SAME: float [[A:%.*]]) {
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; CHECK-NEXT: [[I32:%.*]] = bitcast float [[A]] to i32
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; CHECK-NEXT: [[AND1:%.*]] = and i32 [[I32]], 2139095040
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; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[AND1]], 2139095040
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; CHECK-NEXT: [[AND2:%.*]] = and i32 [[I32]], 8388607
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; CHECK-NEXT: [[CMP2:%.*]] = icmp ne i32 [[AND2]], 0
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; CHECK-NEXT: [[RES:%.*]] = and i1 [[CMP1]], [[CMP2]]
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; CHECK-NEXT: ret i1 [[RES]]
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;
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%i32 = bitcast float %a to i32
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%and1 = and i32 %i32, 2139095040
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%cmp1 = icmp eq i32 %and1, 2139095040
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%and2 = and i32 %i32, 8388607
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%cmp2 = icmp ne i32 %and2, 0
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%res = and i1 %cmp1, %cmp2
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ret i1 %res
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}
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define i1 @f32_fcnan_fcinf_strictfp(float %a) strictfp {
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; CHECK-LABEL: define i1 @f32_fcnan_fcinf_strictfp(
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; CHECK-SAME: float [[A:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[A]])
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq float [[TMP1]], 0x7FF0000000000000
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i32 = bitcast float %a to i32
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%and = and i32 %i32, 2139095040
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%cmp = icmp eq i32 %and, 2139095040
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ret i1 %cmp
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}
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define <2 x i1> @f32_fcnan_fcinf_vec(<2 x float> %a) {
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; CHECK-LABEL: define <2 x i1> @f32_fcnan_fcinf_vec(
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; CHECK-SAME: <2 x float> [[A:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call <2 x float> @llvm.fabs.v2f32(<2 x float> [[A]])
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; CHECK-NEXT: [[CMP:%.*]] = fcmp ueq <2 x float> [[TMP1]], <float 0x7FF0000000000000, float 0x7FF0000000000000>
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; CHECK-NEXT: ret <2 x i1> [[CMP]]
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;
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%i32 = bitcast <2 x float> %a to <2 x i32>
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%and = and <2 x i32> %i32, <i32 2139095040, i32 2139095040>
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%cmp = icmp eq <2 x i32> %and, <i32 2139095040, i32 2139095040>
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ret <2 x i1> %cmp
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}
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; Negative tests
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define i1 @f32_fcnan_fcinf_wrong_mask1(float %a) {
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; CHECK-LABEL: define i1 @f32_fcnan_fcinf_wrong_mask1(
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; CHECK-SAME: float [[A:%.*]]) {
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; CHECK-NEXT: [[I32:%.*]] = bitcast float [[A]] to i32
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[I32]], 2139095041
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 2139095040
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i32 = bitcast float %a to i32
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%and = and i32 %i32, 2139095041
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%cmp = icmp eq i32 %and, 2139095040
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ret i1 %cmp
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}
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define i1 @f32_fcnan_fcinf_wrong_mask2(float %a) {
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; CHECK-LABEL: define i1 @f32_fcnan_fcinf_wrong_mask2(
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; CHECK-SAME: float [[A:%.*]]) {
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; CHECK-NEXT: [[I32:%.*]] = bitcast float [[A]] to i32
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[I32]], 2139095040
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 2130706432
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i32 = bitcast float %a to i32
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%and = and i32 %i32, 2139095040
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%cmp = icmp eq i32 %and, 2130706432
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ret i1 %cmp
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}
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define i1 @f64_fcnan_fcinf_wrong_mask3(double %a) {
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; CHECK-LABEL: define i1 @f64_fcnan_fcinf_wrong_mask3(
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; CHECK-SAME: double [[A:%.*]]) {
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; CHECK-NEXT: [[I64:%.*]] = bitcast double [[A]] to i64
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; CHECK-NEXT: [[AND:%.*]] = and i64 [[I64]], 2139095040
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[AND]], 2139095040
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i64 = bitcast double %a to i64
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%and = and i64 %i64, 2139095040
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%cmp = icmp eq i64 %and, 2139095040
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ret i1 %cmp
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}
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define i1 @f32_fcnan_fcinf_wrong_pred(float %a) {
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; CHECK-LABEL: define i1 @f32_fcnan_fcinf_wrong_pred(
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; CHECK-SAME: float [[A:%.*]]) {
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; CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.fabs.f32(float [[A]])
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; CHECK-NEXT: [[CMP:%.*]] = fcmp one float [[TMP1]], 0x7FF0000000000000
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i32 = bitcast float %a to i32
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%and = and i32 %i32, 2139095040
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%cmp = icmp slt i32 %and, 2139095040
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ret i1 %cmp
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}
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define i1 @f32_fcnan_fcinf_wrong_type1(<2 x float> %a) {
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; CHECK-LABEL: define i1 @f32_fcnan_fcinf_wrong_type1(
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; CHECK-SAME: <2 x float> [[A:%.*]]) {
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; CHECK-NEXT: [[I64:%.*]] = bitcast <2 x float> [[A]] to i64
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; CHECK-NEXT: [[AND:%.*]] = and i64 [[I64]], 2139095040
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[AND]], 2139095040
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i64 = bitcast <2 x float> %a to i64
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%and = and i64 %i64, 2139095040
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%cmp = icmp eq i64 %and, 2139095040
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ret i1 %cmp
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}
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define i1 @f32_fcnan_fcinf_wrong_type2(x86_fp80 %a) {
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; CHECK-LABEL: define i1 @f32_fcnan_fcinf_wrong_type2(
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; CHECK-SAME: x86_fp80 [[A:%.*]]) {
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; CHECK-NEXT: [[I80:%.*]] = bitcast x86_fp80 [[A]] to i80
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; CHECK-NEXT: [[AND:%.*]] = and i80 [[I80]], 2139095040
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i80 [[AND]], 2139095040
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i80 = bitcast x86_fp80 %a to i80
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%and = and i80 %i80, 2139095040
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%cmp = icmp eq i80 %and, 2139095040
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ret i1 %cmp
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}
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define i1 @f32_fcnan_fcinf_noimplicitfloat(float %a) #0 {
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; CHECK-LABEL: define i1 @f32_fcnan_fcinf_noimplicitfloat(
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; CHECK-SAME: float [[A:%.*]]) #[[ATTR1:[0-9]+]] {
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; CHECK-NEXT: [[I32:%.*]] = bitcast float [[A]] to i32
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; CHECK-NEXT: [[AND:%.*]] = and i32 [[I32]], 2139095040
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; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 2139095040
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; CHECK-NEXT: ret i1 [[CMP]]
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;
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%i32 = bitcast float %a to i32
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%and = and i32 %i32, 2139095040
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%cmp = icmp eq i32 %and, 2139095040
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ret i1 %cmp
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}
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attributes #0 = { noimplicitfloat }

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