(a >= b-1) & (a < b) is not simplified for the case b=0

[k-arrows]

This issue is similar to #62586.
https://godbolt.org/z/b5jYsnseT

int foo(int a)
{
    return (a >= -1) & (a < 0);
}

int bar(int a)
{
    return (a == -1);
}

foo(int):                                # @foo(int)
        xor     eax, eax
        cmp     edi, -1
        setge   al
        shr     edi, 31
        and     eax, edi
        ret
bar(int):                                # @bar(int)
        xor     eax, eax
        cmp     edi, -1
        sete    al
        ret

[k-arrows]

https://alive2.llvm.org/ce/z/wV_KBK

define i32 @src(i32 %0) {
%1:
  %2 = icmp sgt i32 %0, 4294967294
  %3 = zext i1 %2 to i32
  %4 = lshr i32 %0, 31
  %5 = and i32 %4, %3
  ret i32 %5
}
=>
define i32 @tgt(i32 %0) {
%1:
  %2 = icmp eq i32 %0, 4294967295
  %3 = zext i1 %2 to i32
  ret i32 %3
}
Transformation seems to be correct!

[XChy]

I think there must be a more general solution to similar situations related to the fold ZExt( a < 0 ) <=> a << 31 .

[k-arrows]

Thank you for your comment. I agree that generalization is necessary, but it seems that it will not be easy because it is a matter of combination with other instructions at last. We would expect no lshr to remain in the example above, but we may want only the lshr to remain, as in the following example:

https://alive2.llvm.org/ce/z/Cwz1Je

define i32 @src(i32 %0) {
%1:
  %2 = icmp slt i32 %0, 1
  %3 = zext i1 %2 to i32
  %4 = lshr i32 %0, 31
  %5 = and i32 %4, %3
  ret i32 %5
}
=>
define i32 @tgt(i32 %0) {
%1:
  %2 = lshr i32 %0, 31
  ret i32 %2
}
Transformation seems to be correct!

Original source code of this example:
https://godbolt.org/z/7vPGs7a4b

int baz(int a)
{
    return (a <= 0) & (a < 0);
}

int qux(int a)
{
    return (a < 0);
}

[XChy]

I agree with you. We need to fold only ZExt( a < 0 ) into a << 31 , and meawhile, for pattern like

(ZExt (a icmp c))  and/or  (a << 31)

we fold a << 31 into ZExt ( a < 0 ) reversely.

Actually, I may have generalized it in foldCastedBitwiseLogic just now.
We just need to additionally match the pattern like A bitwise B, and fold A/B back into ZExt(a < 0) if A/B is a << 31.
And foldCastedBitwiseLogic has implemented the fold logic(cast(icmp), cast(icmp)) -> cast(logic(icmp, icmp)).
Then the original IR will naturally fold into what it should be without bitwise logic operator.

I will test it later. If OK, I will submit a patch.

[XChy]

A related patch: D154791