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[DAG] computeKnownBits - ISD::ABDS is zero in the high bits if the input has multiple sign bits #94442

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RKSimon opened this issue Jun 5, 2024 · 0 comments · Fixed by #94448
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[DAG] computeKnownBits - ISD::ABDS is zero in the high bits if the input has multiple sign bits #94442

RKSimon opened this issue Jun 5, 2024 · 0 comments · Fixed by #94448
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llvm:SelectionDAG SelectionDAGISel as well

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RKSimon commented Jun 5, 2024

Split off from #94344

ABDS alive: https://alive2.llvm.org/ce/z/7_z2Vc

If the inputs are sign extended, then the absolute result is guaranteed to be zero in the (NumSignBits - 1) upper bits.

Noticed while working on #92576
@RKSimon RKSimon added the llvm:SelectionDAG SelectionDAGISel as well label Jun 5, 2024
RKSimon added a commit to RKSimon/llvm-project that referenced this issue Jun 5, 2024
@RKSimon
[AArch64] neon-abd.ll - add ABDS test coverage for llvm#94442
43c677e
RKSimon added a commit to RKSimon/llvm-project that referenced this issue Jun 5, 2024
@RKSimon
[DAG] computeKnownBits - abds(x, y) will be zero in the upper bits if…
a85a14a 
… x and y are sign-extended

As reported on llvm#94442 - if x and y have more than one signbit, then the upper bits of its absolute value are guaranteed to be zero

Alive2: https://alive2.llvm.org/ce/z/7_z2Vc
@RKSimon RKSimon mentioned this issue Jun 5, 2024
Merged
@RKSimon RKSimon self-assigned this Jun 5, 2024
RKSimon added a commit to RKSimon/llvm-project that referenced this issue Jun 5, 2024
@RKSimon
[AArch64] neon-abd.ll - add ABDS test coverage for llvm#94442
e69db9d
RKSimon added a commit to RKSimon/llvm-project that referenced this issue Jun 5, 2024
@RKSimon
[DAG] computeKnownBits - abds(x, y) will be zero in the upper bits if…
f6add38 
… x and y are sign-extended

As reported on llvm#94442 - if x and y have more than one signbit, then the upper bits of its absolute value are guaranteed to be zero

Alive2: https://alive2.llvm.org/ce/z/7_z2Vc
RKSimon added a commit that referenced this issue Jun 5, 2024
@RKSimon
[DAG] computeKnownBits - abds(x, y) will be zero in the upper bits if…
54b20cb 
… x and y are sign-extended (#94448)

As reported on #94442 - if x and y have more than one signbit, then the upper bits of its absolute value are guaranteed to be zero

Sibling PR to #94382

Alive2: https://alive2.llvm.org/ce/z/7_z2Vc

Fixes #94442
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