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[NFC][SPIRV] Fix SPIRV backend build #101081

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[NFC][SPIRV] Fix SPIRV backend build #101081

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4 changes: 3 additions & 1 deletion llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
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Original file line number Diff line number Diff line change
Expand Up @@ -43,6 +43,7 @@ class MachineInstr;
class MachineIRBuilder;
class MachineInstrBuilder;
class MachineFunction;
class MachineModuleInfo;
class MachineOperand;
class MachineRegisterInfo;
class RegisterBankInfo;
Expand Down Expand Up @@ -582,7 +583,8 @@ class GIMatchTableExecutor {
virtual void setupMF(MachineFunction &mf, GISelKnownBits *kb,
CodeGenCoverage *covinfo = nullptr,
ProfileSummaryInfo *psi = nullptr,
BlockFrequencyInfo *bfi = nullptr) {
BlockFrequencyInfo *bfi = nullptr,
MachineModuleInfo *MMI = nullptr) {
CoverageInfo = covinfo;
KB = kb;
MF = &mf;
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4 changes: 3 additions & 1 deletion llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
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Expand Up @@ -19,6 +19,7 @@
#include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
#include "llvm/CodeGen/GlobalISel/Utils.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/TargetLowering.h"
Expand Down Expand Up @@ -102,9 +103,10 @@ bool InstructionSelect::runOnMachineFunction(MachineFunction &MF) {
BFI = &getAnalysis<LazyBlockFrequencyInfoPass>().getBFI();
}

auto *MMI = &getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
CodeGenCoverage CoverageInfo;
assert(ISel && "Cannot work without InstructionSelector");
ISel->setupMF(MF, KB, &CoverageInfo, PSI, BFI);
ISel->setupMF(MF, KB, &CoverageInfo, PSI, BFI, MMI);

// An optimization remark emitter. Used to report failures.
MachineOptimizationRemarkEmitter MORE(MF, /*MBFI=*/nullptr);
Expand Down
4 changes: 2 additions & 2 deletions llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
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Expand Up @@ -78,8 +78,8 @@ class AArch64InstructionSelector : public InstructionSelector {

void setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo, ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) override {
InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI);
BlockFrequencyInfo *BFI, MachineModuleInfo *MMI) override {
InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI, MMI);
MIB.setMF(MF);

// hasFnAttribute() is expensive to call on every BRCOND selection, so
Expand Down
5 changes: 3 additions & 2 deletions llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
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Expand Up @@ -60,11 +60,12 @@ const char *AMDGPUInstructionSelector::getName() { return DEBUG_TYPE; }
void AMDGPUInstructionSelector::setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo,
ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) {
BlockFrequencyInfo *BFI,
MachineModuleInfo *MMI) {
MRI = &MF.getRegInfo();
Subtarget = &MF.getSubtarget<GCNSubtarget>();
Subtarget->checkSubtargetFeatures(MF.getFunction());
InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI);
InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI, MMI);
}

// Return the wave level SGPR base address if this is a wave address.
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
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Expand Up @@ -60,7 +60,7 @@ class AMDGPUInstructionSelector final : public InstructionSelector {

void setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo, ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) override;
BlockFrequencyInfo *BFI, MachineModuleInfo *MMI) override;

private:
struct GEPInfo {
Expand Down
9 changes: 5 additions & 4 deletions llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
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Expand Up @@ -88,7 +88,7 @@ class SPIRVInstructionSelector : public InstructionSelector {
const RegisterBankInfo &RBI);
void setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo, ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) override;
BlockFrequencyInfo *BFI, MachineModuleInfo *MMI) override;
// Common selection code. Instruction-specific selection occurs in spvSelect.
bool select(MachineInstr &I) override;
static const char *getName() { return DEBUG_TYPE; }
Expand Down Expand Up @@ -279,11 +279,12 @@ SPIRVInstructionSelector::SPIRVInstructionSelector(const SPIRVTargetMachine &TM,
void SPIRVInstructionSelector::setupMF(MachineFunction &MF, GISelKnownBits *KB,
CodeGenCoverage *CoverageInfo,
ProfileSummaryInfo *PSI,
BlockFrequencyInfo *BFI) {
MMI = &MF.getMMI().getObjFileInfo<SPIRVMachineModuleInfo>();
BlockFrequencyInfo *BFI,
MachineModuleInfo *MI) {
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This should probably be MMI - MI usually stands for MachineInstruction

MMI = &MI->getObjFileInfo<SPIRVMachineModuleInfo>();
MRI = &MF.getRegInfo();
GR.setCurrentFunc(MF);
InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI);
InstructionSelector::setupMF(MF, KB, CoverageInfo, PSI, BFI, MI);
}

static bool isImm(const MachineOperand &MO, MachineRegisterInfo *MRI);
Expand Down
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