[RISCV][Docs] Remove Zvbb, Zvbc and Zvk* from experimental C intrinsics section of RISCVUsage.rst. NFC #108718
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…cs section of RISCVUsage.rst. NFC These are no longer experimental after 051054e. I left the section because we will be adding intrinsics for Zvkgs and Zvbc32e.
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@llvm/pr-subscribers-backend-risc-v Author: Craig Topper (topperc) ChangesThese are no longer experimental after 051054e. I left the section because we will be adding intrinsics for Zvkgs and Zvbc32e. Full diff: https://github.com/llvm/llvm-project/pull/108718.diff 1 Files Affected:
diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst
index 60f0f09a200dd9..57c857c9eb4e23 100644
--- a/llvm/docs/RISCVUsage.rst
+++ b/llvm/docs/RISCVUsage.rst
@@ -421,19 +421,4 @@ extension are still experimental. To use C intrinsics for such an extension
from `clang`, you must add `-menable-experimental-extensions` to the command
line. This currently applies to the following extensions:
-* ``Zvbb``
-* ``Zvbc``
-* ``Zvkb``
-* ``Zvkg``
-* ``Zvkn``
-* ``Zvknc``
-* ``Zvkned``
-* ``Zvkng``
-* ``Zvknha``
-* ``Zvknhb``
-* ``Zvks``
-* ``Zvksc``
-* ``Zvksed``
-* ``Zvksg``
-* ``Zvksh``
-* ``Zvkt``
+No extensions have experimental intrinsics.
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These are no longer experimental after 051054e. I left the section because we will be adding intrinsics for Zvkgs and Zvbc32e.