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[AMDGPU][NPM] Port SIMemoryLegalizer to NPM #130060

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Merged
merged 2 commits into from
Mar 12, 2025
Merged

[AMDGPU][NPM] Port SIMemoryLegalizer to NPM #130060

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8702b14
[AMDGPU][NPM] Port SIMemoryLegalizer to NPM
optimisan Mar 5, 2025
b61adcc
fix analysis proxy type
optimisan Mar 10, 2025
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9 changes: 8 additions & 1 deletion llvm/lib/Target/AMDGPU/AMDGPU.h
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Original file line number Diff line number Diff line change
Expand Up @@ -358,6 +358,13 @@ class SIModeRegisterPass : public PassInfoMixin<SIModeRegisterPass> {
PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM);
};

class SIMemoryLegalizerPass : public PassInfoMixin<SIMemoryLegalizerPass> {
public:
PreservedAnalyses run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM);
static bool isRequired() { return true; }
};

FunctionPass *createAMDGPUAnnotateUniformValuesLegacy();

ModulePass *createAMDGPUPrintfRuntimeBinding();
Expand Down Expand Up @@ -422,7 +429,7 @@ class SIAnnotateControlFlowPass
void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &);
extern char &SIAnnotateControlFlowLegacyPassID;

void initializeSIMemoryLegalizerPass(PassRegistry&);
void initializeSIMemoryLegalizerLegacyPass(PassRegistry &);
extern char &SIMemoryLegalizerID;

void initializeSIModeRegisterLegacyPass(PassRegistry &);
Expand Down
2 changes: 1 addition & 1 deletion llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
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Expand Up @@ -113,6 +113,7 @@ MACHINE_FUNCTION_PASS("si-load-store-opt", SILoadStoreOptimizerPass())
MACHINE_FUNCTION_PASS("si-lower-control-flow", SILowerControlFlowPass())
MACHINE_FUNCTION_PASS("si-lower-sgpr-spills", SILowerSGPRSpillsPass())
MACHINE_FUNCTION_PASS("si-lower-wwm-copies", SILowerWWMCopiesPass())
MACHINE_FUNCTION_PASS("si-memory-legalizer", SIMemoryLegalizerPass())
MACHINE_FUNCTION_PASS("si-mode-register", SIModeRegisterPass())
MACHINE_FUNCTION_PASS("si-opt-vgpr-liverange", SIOptimizeVGPRLiveRangePass())
MACHINE_FUNCTION_PASS("si-optimize-exec-masking", SIOptimizeExecMaskingPass())
Expand All @@ -132,7 +133,6 @@ DUMMY_MACHINE_FUNCTION_PASS("amdgpu-set-wave-priority", AMDGPUSetWavePriorityPas
DUMMY_MACHINE_FUNCTION_PASS("si-insert-hard-clauses", SIInsertHardClausesPass())
DUMMY_MACHINE_FUNCTION_PASS("si-insert-waitcnts", SIInsertWaitcntsPass())
DUMMY_MACHINE_FUNCTION_PASS("si-late-branch-lowering", SILateBranchLoweringPass())
DUMMY_MACHINE_FUNCTION_PASS("si-memory-legalizer", SIMemoryLegalizerPass())
DUMMY_MACHINE_FUNCTION_PASS("si-pre-emit-peephole", SIPreEmitPeepholePass())
// TODO: Move amdgpu-preload-kern-arg-prolog to MACHINE_FUNCTION_PASS since it
// already exists.
Expand Down
5 changes: 3 additions & 2 deletions llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
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Expand Up @@ -542,7 +542,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
initializeSILowerControlFlowLegacyPass(*PR);
initializeSIPreEmitPeepholePass(*PR);
initializeSILateBranchLoweringPass(*PR);
initializeSIMemoryLegalizerPass(*PR);
initializeSIMemoryLegalizerLegacyPass(*PR);
initializeSIOptimizeExecMaskingLegacyPass(*PR);
initializeSIPreAllocateWWMRegsLegacyPass(*PR);
initializeSIFormMemoryClausesLegacyPass(*PR);
Expand Down Expand Up @@ -2152,7 +2152,8 @@ void AMDGPUCodeGenPassBuilder::addPreEmitPass(AddMachinePass &addPass) const {
if (isPassEnabled(EnableVOPD, CodeGenOptLevel::Less)) {
// TODO: addPass(GCNCreateVOPDPass());
}
// TODO: addPass(SIMemoryLegalizerPass());

addPass(SIMemoryLegalizerPass());
// TODO: addPass(SIInsertWaitcntsPass());

// TODO: addPass(SIModeRegisterPass());
Expand Down
43 changes: 33 additions & 10 deletions llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
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Expand Up @@ -21,8 +21,10 @@
#include "llvm/ADT/StringExtras.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/IR/DiagnosticInfo.h"
#include "llvm/IR/MemoryModelRelaxationAnnotations.h"
#include "llvm/IR/PassManager.h"
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/TargetParser/TargetParser.h"

Expand Down Expand Up @@ -625,9 +627,9 @@ class SIGfx12CacheControl : public SIGfx11CacheControl {
}
};

class SIMemoryLegalizer final : public MachineFunctionPass {
class SIMemoryLegalizer final {
private:

const MachineModuleInfo &MMI;
/// Cache Control.
std::unique_ptr<SICacheControl> CC = nullptr;

Expand Down Expand Up @@ -661,10 +663,16 @@ class SIMemoryLegalizer final : public MachineFunctionPass {
bool expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI,
MachineBasicBlock::iterator &MI);

public:
SIMemoryLegalizer(const MachineModuleInfo &MMI) : MMI(MMI) {};
bool run(MachineFunction &MF);
};

class SIMemoryLegalizerLegacy final : public MachineFunctionPass {
public:
static char ID;

SIMemoryLegalizer() : MachineFunctionPass(ID) {}
SIMemoryLegalizerLegacy() : MachineFunctionPass(ID) {}

void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
Expand Down Expand Up @@ -2767,11 +2775,26 @@ bool SIMemoryLegalizer::expandAtomicCmpxchgOrRmw(const SIMemOpInfo &MOI,
return Changed;
}

bool SIMemoryLegalizer::runOnMachineFunction(MachineFunction &MF) {
bool Changed = false;

bool SIMemoryLegalizerLegacy::runOnMachineFunction(MachineFunction &MF) {
const MachineModuleInfo &MMI =
getAnalysis<MachineModuleInfoWrapperPass>().getMMI();
return SIMemoryLegalizer(MMI).run(MF);
}

PreservedAnalyses
SIMemoryLegalizerPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
auto *MMI = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(MF)
.getCachedResult<MachineModuleAnalysis>(
*MF.getFunction().getParent());
assert(MMI && "MachineModuleAnalysis must be available");
if (!SIMemoryLegalizer(MMI->getMMI()).run(MF))
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This pass shouldn't really depend on MachineModuleInfo (not this patch's fault though)

return PreservedAnalyses::all();
return getMachineFunctionPassPreservedAnalyses().preserveSet<CFGAnalyses>();
}

bool SIMemoryLegalizer::run(MachineFunction &MF) {
bool Changed = false;

SIMemOpAccess MOA(MMI.getObjFileInfo<AMDGPUMachineModuleInfo>());
CC = SICacheControl::create(MF.getSubtarget<GCNSubtarget>());
Expand Down Expand Up @@ -2812,11 +2835,11 @@ bool SIMemoryLegalizer::runOnMachineFunction(MachineFunction &MF) {
return Changed;
}

INITIALIZE_PASS(SIMemoryLegalizer, DEBUG_TYPE, PASS_NAME, false, false)
INITIALIZE_PASS(SIMemoryLegalizerLegacy, DEBUG_TYPE, PASS_NAME, false, false)

char SIMemoryLegalizer::ID = 0;
char &llvm::SIMemoryLegalizerID = SIMemoryLegalizer::ID;
char SIMemoryLegalizerLegacy::ID = 0;
char &llvm::SIMemoryLegalizerID = SIMemoryLegalizerLegacy::ID;

FunctionPass *llvm::createSIMemoryLegalizerPass() {
return new SIMemoryLegalizer();
return new SIMemoryLegalizerLegacy();
}