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release/20.x: [LoongArch][MC] Add relocation support for fld fst [x]vld [x]vst #133836

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Merged
merged 2 commits into from
Apr 1, 2025

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@llvmbot llvmbot commented Apr 1, 2025

Backport 725a7b6 d055e58

Requested by: @SixWeining

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llvmbot commented Apr 1, 2025

@SixWeining @tangaac What do you think about merging this PR to the release branch?

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llvmbot commented Apr 1, 2025

@llvm/pr-subscribers-mc

@llvm/pr-subscribers-backend-loongarch

Author: None (llvmbot)

Changes

Backport 725a7b6 d055e58

Requested by: @SixWeining


Full diff: https://github.com/llvm/llvm-project/pull/133836.diff

6 Files Affected:

  • (modified) llvm/lib/Target/LoongArch/LoongArchFloatInstrFormats.td (+2-2)
  • (modified) llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td (+2-2)
  • (modified) llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td (+2-2)
  • (modified) llvm/test/MC/LoongArch/Relocations/relocations.s (+30)
  • (modified) llvm/test/MC/LoongArch/lasx/invalid-imm.s (+6-6)
  • (modified) llvm/test/MC/LoongArch/lsx/invalid-imm.s (+6-6)
diff --git a/llvm/lib/Target/LoongArch/LoongArchFloatInstrFormats.td b/llvm/lib/Target/LoongArch/LoongArchFloatInstrFormats.td
index f66f620ca8b26..ce42236895c76 100644
--- a/llvm/lib/Target/LoongArch/LoongArchFloatInstrFormats.td
+++ b/llvm/lib/Target/LoongArch/LoongArchFloatInstrFormats.td
@@ -206,7 +206,7 @@ class FP_LOAD_3R<bits<32> op, RegisterClass rc = FPR32>
     : FPFmtMEM<op, (outs rc:$fd), (ins GPR:$rj, GPR:$rk),
                "$fd, $rj, $rk">;
 class FP_LOAD_2RI12<bits<32> op, RegisterClass rc = FPR32>
-    : FPFmt2RI12<op, (outs rc:$fd), (ins GPR:$rj, simm12:$imm12),
+    : FPFmt2RI12<op, (outs rc:$fd), (ins GPR:$rj, simm12_addlike:$imm12),
                  "$fd, $rj, $imm12">;
 } // hasSideEffects = 0, mayLoad = 1, mayStore = 0
 
@@ -215,7 +215,7 @@ class FP_STORE_3R<bits<32> op, RegisterClass rc = FPR32>
     : FPFmtMEM<op, (outs), (ins rc:$fd, GPR:$rj, GPR:$rk),
                "$fd, $rj, $rk">;
 class FP_STORE_2RI12<bits<32> op, RegisterClass rc = FPR32>
-    : FPFmt2RI12<op, (outs), (ins rc:$fd, GPR:$rj, simm12:$imm12),
+    : FPFmt2RI12<op, (outs), (ins rc:$fd, GPR:$rj, simm12_addlike:$imm12),
                  "$fd, $rj, $imm12">;
 } // hasSideEffects = 0, mayLoad = 0, mayStore = 1
 
diff --git a/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
index 24b5ed5a9344f..7022fddf34100 100644
--- a/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
@@ -186,10 +186,10 @@ class LASX2RI10_Load<bits<32> op, Operand ImmOpnd = simm10_lsl2>
 class LASX2RI11_Load<bits<32> op, Operand ImmOpnd = simm11_lsl1>
     : Fmt2RI11_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm11),
                   "$xd, $rj, $imm11">;
-class LASX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12>
+class LASX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12_addlike>
     : Fmt2RI12_XRI<op, (outs LASX256:$xd), (ins GPR:$rj, ImmOpnd:$imm12),
                   "$xd, $rj, $imm12">;
-class LASX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12>
+class LASX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12_addlike>
     : Fmt2RI12_XRI<op, (outs), (ins LASX256:$xd, GPR:$rj, ImmOpnd:$imm12),
                   "$xd, $rj, $imm12">;
 
diff --git a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
index d2063a8aaae9b..e37de4f545a2a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
@@ -374,10 +374,10 @@ class LSX2RI10_Load<bits<32> op, Operand ImmOpnd = simm10_lsl2>
 class LSX2RI11_Load<bits<32> op, Operand ImmOpnd = simm11_lsl1>
     : Fmt2RI11_VRI<op, (outs LSX128:$vd), (ins GPR:$rj, ImmOpnd:$imm11),
                   "$vd, $rj, $imm11">;
-class LSX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12>
+class LSX2RI12_Load<bits<32> op, Operand ImmOpnd = simm12_addlike>
     : Fmt2RI12_VRI<op, (outs LSX128:$vd), (ins GPR:$rj, ImmOpnd:$imm12),
                   "$vd, $rj, $imm12">;
-class LSX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12>
+class LSX2RI12_Store<bits<32> op, Operand ImmOpnd = simm12_addlike>
     : Fmt2RI12_VRI<op, (outs), (ins LSX128:$vd, GPR:$rj, ImmOpnd:$imm12),
                   "$vd, $rj, $imm12">;
 
diff --git a/llvm/test/MC/LoongArch/Relocations/relocations.s b/llvm/test/MC/LoongArch/Relocations/relocations.s
index 091dce200b7de..f91a941295d9e 100644
--- a/llvm/test/MC/LoongArch/Relocations/relocations.s
+++ b/llvm/test/MC/LoongArch/Relocations/relocations.s
@@ -308,3 +308,33 @@ pcaddi $t1, %desc_pcrel_20(foo)
 # RELOC: R_LARCH_TLS_DESC_PCREL20_S2 foo 0x0
 # INSTR: pcaddi $t1, %desc_pcrel_20(foo)
 # FIXUP: fixup A - offset: 0, value: %desc_pcrel_20(foo), kind: FK_NONE
+
+fld.s $ft1, $a0, %pc_lo12(foo)
+# RELOC: R_LARCH_PCALA_LO12 foo 0x0
+# INSTR: fld.s $ft1, $a0, %pc_lo12(foo)
+# FIXUP: fixup A - offset: 0, value: %pc_lo12(foo), kind: FK_NONE
+
+fst.d $ft1, $a0, %pc_lo12(foo)
+# RELOC: R_LARCH_PCALA_LO12 foo 0x0
+# INSTR: fst.d $ft1, $a0, %pc_lo12(foo)
+# FIXUP: fixup A - offset: 0, value: %pc_lo12(foo), kind: FK_NONE
+
+vld $vr9, $a0, %pc_lo12(foo)
+# RELOC: R_LARCH_PCALA_LO12 foo 0x0
+# INSTR: vld $vr9, $a0, %pc_lo12(foo)
+# FIXUP: fixup A - offset: 0, value: %pc_lo12(foo), kind: FK_NONE
+
+vst $vr9, $a0, %pc_lo12(foo)
+# RELOC: R_LARCH_PCALA_LO12 foo 0x0
+# INSTR: vst $vr9, $a0, %pc_lo12(foo)
+# FIXUP: fixup A - offset: 0, value: %pc_lo12(foo), kind: FK_NONE
+
+xvld $xr9, $a0, %pc_lo12(foo)
+# RELOC: R_LARCH_PCALA_LO12 foo 0x0
+# INSTR: xvld $xr9, $a0, %pc_lo12(foo)
+# FIXUP: fixup A - offset: 0, value: %pc_lo12(foo), kind: FK_NONE
+
+xvst $xr9, $a0, %pc_lo12(foo)
+# RELOC: R_LARCH_PCALA_LO12 foo 0x0
+# INSTR: xvst $xr9, $a0, %pc_lo12(foo)
+# FIXUP: fixup A - offset: 0, value: %pc_lo12(foo), kind: FK_NONE
diff --git a/llvm/test/MC/LoongArch/lasx/invalid-imm.s b/llvm/test/MC/LoongArch/lasx/invalid-imm.s
index 6f64a6f87802b..adfd35367d7ba 100644
--- a/llvm/test/MC/LoongArch/lasx/invalid-imm.s
+++ b/llvm/test/MC/LoongArch/lasx/invalid-imm.s
@@ -1167,22 +1167,22 @@ xvldrepl.h $xr0, $a0, 2048
 
 ## simm12
 xvldrepl.b $xr0, $a0, -2049
-# CHECK: :[[#@LINE-1]]:23: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:23: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 xvldrepl.b $xr0, $a0, 2048
-# CHECK: :[[#@LINE-1]]:23: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:23: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 xvst $xr0, $a0, -2049
-# CHECK: :[[#@LINE-1]]:17: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:17: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 xvst $xr0, $a0, 2048
-# CHECK: :[[#@LINE-1]]:17: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:17: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 xvld $xr0, $a0, -2049
-# CHECK: :[[#@LINE-1]]:17: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:17: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 xvld $xr0, $a0, 2048
-# CHECK: :[[#@LINE-1]]:17: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:17: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 ## simm13
 xvldi $xr0, -4097
diff --git a/llvm/test/MC/LoongArch/lsx/invalid-imm.s b/llvm/test/MC/LoongArch/lsx/invalid-imm.s
index c3f9aaa082818..61fbac06794c7 100644
--- a/llvm/test/MC/LoongArch/lsx/invalid-imm.s
+++ b/llvm/test/MC/LoongArch/lsx/invalid-imm.s
@@ -1167,22 +1167,22 @@ vldrepl.h $vr0, $a0, 2048
 
 ## simm12
 vldrepl.b $vr0, $a0, -2049
-# CHECK: :[[#@LINE-1]]:22: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:22: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 vldrepl.b $vr0, $a0, 2048
-# CHECK: :[[#@LINE-1]]:22: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:22: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 vst $vr0, $a0, -2049
-# CHECK: :[[#@LINE-1]]:16: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:16: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 vst $vr0, $a0, 2048
-# CHECK: :[[#@LINE-1]]:16: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:16: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 vld $vr0, $a0, -2049
-# CHECK: :[[#@LINE-1]]:16: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:16: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 vld $vr0, $a0, 2048
-# CHECK: :[[#@LINE-1]]:16: error: immediate must be an integer in the range [-2048, 2047]
+# CHECK: :[[#@LINE-1]]:16: error: operand must be a symbol with modifier (e.g. %pc_lo12) or an integer in the range [-2048, 2047]
 
 ## simm13
 vldi $vr0, -4097

@tstellar tstellar moved this from Needs Triage to Needs Review in LLVM Release Status Apr 1, 2025
@tstellar tstellar moved this from Needs Review to Needs Merge in LLVM Release Status Apr 1, 2025
Reviewed By: SixWeining

Pull Request: llvm#133224

(cherry picked from commit 725a7b6)
This also fixes errors when using Clang with step-by-step compilation.
Because the optimization will pass relocation information to memory
access instructions. For example:
t.c:
```
float f = 0.1;
float foo() { return f;}
```
```
clang --target=loongarch64 -O2 -c t.c --save-temps
```

Reviewed By: tangaac, SixWeining

Pull Request: llvm#133225

(cherry picked from commit d055e58)
@tstellar tstellar merged commit e256eda into llvm:release/20.x Apr 1, 2025
7 of 9 checks passed
@github-project-automation github-project-automation bot moved this from Needs Merge to Done in LLVM Release Status Apr 1, 2025
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github-actions bot commented Apr 1, 2025

@SixWeining (or anyone else). If you would like to add a note about this fix in the release notes (completely optional). Please reply to this comment with a one or two sentence description of the fix. When you are done, please add the release:note label to this PR.

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