[TableGen] Use llvm::enumerate in one place (NFC)

[s-barannikov]

No description provided.

[llvmbot]

@llvm/pr-subscribers-tablegen

Author: Sergei Barannikov (s-barannikov)

Changes

---

Full diff: https://github.com/llvm/llvm-project/pull/136399.diff

1 Files Affected:

• (modified) llvm/utils/TableGen/Common/CodeGenInstAlias.cpp (+11-13)

diff --git a/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp b/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
index 5537a2fa8b980..94c0d51faf2e9 100644
--- a/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
+++ b/llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
@@ -200,17 +200,15 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
 
   // Decode and validate the arguments of the result.
   unsigned AliasOpNo = 0;
-  for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) {
-
+  for (auto [OpIdx, OpInfo] : enumerate(ResultInst->Operands)) {
     // Tied registers don't have an entry in the result dag unless they're part
     // of a complex operand, in which case we include them anyways, as we
     // don't have any other way to specify the whole operand.
-    if (ResultInst->Operands[i].MINumOperands == 1 &&
-        ResultInst->Operands[i].getTiedRegister() != -1) {
+    if (OpInfo.MINumOperands == 1 && OpInfo.getTiedRegister() != -1) {
       // Tied operands of different RegisterClass should be explicit within an
       // instruction's syntax and so cannot be skipped.
-      int TiedOpNum = ResultInst->Operands[i].getTiedRegister();
-      if (ResultInst->Operands[i].Rec->getName() ==
+      int TiedOpNum = OpInfo.getTiedRegister();
+      if (OpInfo.Rec->getName() ==
           ResultInst->Operands[TiedOpNum].Rec->getName())
         continue;
     }
@@ -218,8 +216,8 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
     if (AliasOpNo >= Result->getNumArgs())
       PrintFatalError(R->getLoc(), "not enough arguments for instruction!");
 
-    const Record *InstOpRec = ResultInst->Operands[i].Rec;
-    unsigned NumSubOps = ResultInst->Operands[i].MINumOperands;
+    const Record *InstOpRec = OpInfo.Rec;
+    unsigned NumSubOps = OpInfo.MINumOperands;
     ResultOperand ResOp(static_cast<int64_t>(0));
     if (tryAliasOpMatch(Result, AliasOpNo, InstOpRec, (NumSubOps > 1),
                         R->getLoc(), T, ResOp)) {
@@ -229,12 +227,12 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
                              InstOpRec->getValueAsDef("ParserMatchClass")
                                      ->getValueAsString("Name") != "Imm")) {
         ResultOperands.push_back(std::move(ResOp));
-        ResultInstOperandIndex.emplace_back(i, -1);
+        ResultInstOperandIndex.emplace_back(OpIdx, -1);
         ++AliasOpNo;
 
         // Otherwise, we need to match each of the suboperands individually.
       } else {
-        const DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo;
+        const DagInit *MIOI = OpInfo.MIOperandInfo;
         for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) {
           const Record *SubRec = cast<DefInit>(MIOI->getArg(SubOp))->getDef();
 
@@ -244,7 +242,7 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
               Result->getArgName(AliasOpNo)->getAsUnquotedString() + "." +
                   MIOI->getArgName(SubOp)->getAsUnquotedString(),
               SubRec);
-          ResultInstOperandIndex.emplace_back(i, SubOp);
+          ResultInstOperandIndex.emplace_back(OpIdx, SubOp);
         }
         ++AliasOpNo;
       }
@@ -254,7 +252,7 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
     // If the argument did not match the instruction operand, and the operand
     // is composed of multiple suboperands, try matching the suboperands.
     if (NumSubOps > 1) {
-      const DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo;
+      const DagInit *MIOI = OpInfo.MIOperandInfo;
       for (unsigned SubOp = 0; SubOp != NumSubOps; ++SubOp) {
         if (AliasOpNo >= Result->getNumArgs())
           PrintFatalError(R->getLoc(), "not enough arguments for instruction!");
@@ -262,7 +260,7 @@ CodeGenInstAlias::CodeGenInstAlias(const Record *R, const CodeGenTarget &T)
         if (tryAliasOpMatch(Result, AliasOpNo, SubRec, false, R->getLoc(), T,
                             ResOp)) {
           ResultOperands.push_back(ResOp);
-          ResultInstOperandIndex.emplace_back(i, SubOp);
+          ResultInstOperandIndex.emplace_back(OpIdx, SubOp);
           ++AliasOpNo;
         } else {
           PrintFatalError(

[kazutakahirata]

Could we use const auto &[OpIdx, OpInfo] here to avoid making a copy?

[s-barannikov]

If you're concerned about copying OpInfo, then there is no copy, AFAICT.
static_assert(std::is_reference_v<decltype(OpInfo)>); doesn't trigger.
I never learned how structured bindings exactly work, but it must be something with the fact that & applies to the structure itself and not to its elements.

[s-barannikov]

FWIW the size of the structure appears to be just 16 bytes.

[kuhar]

There is no copying here. This style is used all over mlir with enumerate.

[kuhar]

See https://llvm.org/docs/ProgrammersManual.html#iterating-over-ranges