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[builtins] Refactor cpu_model support to reduce #if nesting. NFCI #75635
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jroelofs
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users/jroelofs/spr/builtins-refactor-cpu_model-support-to-reduce-if-nesting-nfci
Dec 19, 2023
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336d162
[𝘀𝗽𝗿] initial version
jroelofs bf23095
fix formatting, address my own nits
jroelofs ce4e19c
s/Fucsia/Fuchsia/
jroelofs 4919e63
reorder includes
jroelofs 6f3d997
turn off clang-format, it's wrong
jroelofs 6699a29
s/fucsia/fuchsia/
jroelofs 4d7f76a
add EOF newline
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,140 @@ | ||
//===-- cpu_model/aarch64.c - Support for __cpu_model builtin ----*- C -*-===// | ||
// | ||
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. | ||
// See https://llvm.org/LICENSE.txt for license information. | ||
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
// | ||
//===----------------------------------------------------------------------===// | ||
// | ||
// This file is based on LLVM's lib/Support/Host.cpp. | ||
// It implements __aarch64_have_lse_atomics, __aarch64_cpu_features for | ||
// AArch64. | ||
// | ||
//===----------------------------------------------------------------------===// | ||
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#include "cpu_model.h" | ||
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#if !defined(__aarch64__) | ||
#error This file is intended only for aarch64-based targets | ||
#endif | ||
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#if __has_include(<sys/ifunc.h>) | ||
#include <sys/ifunc.h> | ||
#else | ||
typedef struct __ifunc_arg_t { | ||
unsigned long _size; | ||
unsigned long _hwcap; | ||
unsigned long _hwcap2; | ||
} __ifunc_arg_t; | ||
#endif // __has_include(<sys/ifunc.h>) | ||
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// LSE support detection for out-of-line atomics | ||
// using HWCAP and Auxiliary vector | ||
_Bool __aarch64_have_lse_atomics | ||
__attribute__((visibility("hidden"), nocommon)) = false; | ||
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#if defined(__FreeBSD__) | ||
#include "lse_atomics/freebsd.inc" | ||
#elif defined(__Fucsia__) | ||
#include "lse_atomics/fucsia.inc" | ||
#elif defined(__ANDROID__) | ||
#include "lse_atomics/android.inc" | ||
#elif __has_include(<sys/auxv.h>) | ||
#include "lse_atomics/sysauxv.inc" | ||
#else | ||
// When unimplemented, we leave __aarch64_have_lse_atomics initialized to false. | ||
#endif | ||
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#if !defined(DISABLE_AARCH64_FMV) | ||
// CPUFeatures must correspond to the same AArch64 features in | ||
// AArch64TargetParser.h | ||
enum CPUFeatures { | ||
FEAT_RNG, | ||
FEAT_FLAGM, | ||
FEAT_FLAGM2, | ||
FEAT_FP16FML, | ||
FEAT_DOTPROD, | ||
FEAT_SM4, | ||
FEAT_RDM, | ||
FEAT_LSE, | ||
FEAT_FP, | ||
FEAT_SIMD, | ||
FEAT_CRC, | ||
FEAT_SHA1, | ||
FEAT_SHA2, | ||
FEAT_SHA3, | ||
FEAT_AES, | ||
FEAT_PMULL, | ||
FEAT_FP16, | ||
FEAT_DIT, | ||
FEAT_DPB, | ||
FEAT_DPB2, | ||
FEAT_JSCVT, | ||
FEAT_FCMA, | ||
FEAT_RCPC, | ||
FEAT_RCPC2, | ||
FEAT_FRINTTS, | ||
FEAT_DGH, | ||
FEAT_I8MM, | ||
FEAT_BF16, | ||
FEAT_EBF16, | ||
FEAT_RPRES, | ||
FEAT_SVE, | ||
FEAT_SVE_BF16, | ||
FEAT_SVE_EBF16, | ||
FEAT_SVE_I8MM, | ||
FEAT_SVE_F32MM, | ||
FEAT_SVE_F64MM, | ||
FEAT_SVE2, | ||
FEAT_SVE_AES, | ||
FEAT_SVE_PMULL128, | ||
FEAT_SVE_BITPERM, | ||
FEAT_SVE_SHA3, | ||
FEAT_SVE_SM4, | ||
FEAT_SME, | ||
FEAT_MEMTAG, | ||
FEAT_MEMTAG2, | ||
FEAT_MEMTAG3, | ||
FEAT_SB, | ||
FEAT_PREDRES, | ||
FEAT_SSBS, | ||
FEAT_SSBS2, | ||
FEAT_BTI, | ||
FEAT_LS64, | ||
FEAT_LS64_V, | ||
FEAT_LS64_ACCDATA, | ||
FEAT_WFXT, | ||
FEAT_SME_F64, | ||
FEAT_SME_I64, | ||
FEAT_SME2, | ||
FEAT_RCPC3, | ||
FEAT_MAX, | ||
FEAT_EXT = 62, // Reserved to indicate presence of additional features field | ||
// in __aarch64_cpu_features | ||
FEAT_INIT // Used as flag of features initialization completion | ||
}; | ||
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// Architecture features used | ||
// in Function Multi Versioning | ||
struct { | ||
unsigned long long features; | ||
// As features grows new fields could be added | ||
} __aarch64_cpu_features __attribute__((visibility("hidden"), nocommon)); | ||
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#if defined(__FreeBSD__) | ||
#include "aarch64/fmv/freebsd.inc" | ||
#include "aarch64/fmv/mrs.inc" | ||
#elif defined(__Fucsia__) | ||
#include "aarch64/fmv/fucsia.inc" | ||
#include "aarch64/fmv/mrs.inc" | ||
#elif defined(__ANDROID__) | ||
#include "aarch64/fmv/android.inc" | ||
#include "aarch64/fmv/mrs.inc" | ||
#elif __has_include(<sys/auxv.h>) | ||
#include "aarch64/fmv/mrs.inc" | ||
#include "aarch64/fmv/sysauxv.inc" | ||
#else | ||
#include "aarch64/fmv/unimplemented.inc" | ||
#endif | ||
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#endif // !defined(DISABLE_AARCH64_FMV) |
33 changes: 33 additions & 0 deletions
33
compiler-rt/lib/builtins/cpu_model/aarch64/fmv/android.inc
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@@ -0,0 +1,33 @@ | ||
void __init_cpu_features_resolver(unsigned long hwcap, | ||
const __ifunc_arg_t *arg) { | ||
if (__aarch64_cpu_features.features) | ||
return; | ||
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// ifunc resolvers don't have hwcaps in arguments on Android API lower | ||
// than 30. If so, set feature detection done and keep all CPU features | ||
// unsupported (zeros). To detect this case in runtime we check existence | ||
// of memfd_create function from Standard C library which was introduced in | ||
// Android API 30. | ||
int memfd_create(const char *, unsigned int) __attribute__((weak)); | ||
if (!memfd_create) | ||
return; | ||
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__init_cpu_features_constructor(hwcap, arg); | ||
} | ||
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void CONSTRUCTOR_ATTRIBUTE __init_cpu_features(void) { | ||
// CPU features already initialized. | ||
if (__aarch64_cpu_features.features) | ||
return; | ||
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// Don't set any CPU features, | ||
// detection could be wrong on Exynos 9810. | ||
if (__isExynos9810()) | ||
return; | ||
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__ifunc_arg_t arg; | ||
arg._size = sizeof(__ifunc_arg_t); | ||
arg._hwcap = getauxval(AT_HWCAP); | ||
arg._hwcap2 = getauxval(AT_HWCAP2); | ||
__init_cpu_features_constructor(hwcap | _IFUNC_ARG_HWCAP, &arg); | ||
} |
27 changes: 27 additions & 0 deletions
27
compiler-rt/lib/builtins/cpu_model/aarch64/fmv/freebsd.inc
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@@ -0,0 +1,27 @@ | ||
void __init_cpu_features_resolver(unsigned long hwcap, | ||
const __ifunc_arg_t *arg) { | ||
if (__aarch64_cpu_features.features) | ||
return; | ||
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__init_cpu_features_constructor(hwcap, arg); | ||
} | ||
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void CONSTRUCTOR_ATTRIBUTE __init_cpu_features(void) { | ||
unsigned long hwcap = 0; | ||
unsigned long hwcap2 = 0; | ||
// CPU features already initialized. | ||
if (__aarch64_cpu_features.features) | ||
return; | ||
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int res = 0; | ||
res = elf_aux_info(AT_HWCAP, &hwcap, sizeof hwcap); | ||
res |= elf_aux_info(AT_HWCAP2, &hwcap2, sizeof hwcap2); | ||
if (res) | ||
return; | ||
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__ifunc_arg_t arg; | ||
arg._size = sizeof(__ifunc_arg_t); | ||
arg._hwcap = hwcap; | ||
arg._hwcap2 = hwcap2; | ||
__init_cpu_features_constructor(hwcap | _IFUNC_ARG_HWCAP, &arg); | ||
} |
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Original file line number | Diff line number | Diff line change |
---|---|---|
@@ -0,0 +1,19 @@ | ||
void __init_cpu_features_resolver(unsigned long hwcap, | ||
const __ifunc_arg_t *arg) { | ||
if (__aarch64_cpu_features.features) | ||
return; | ||
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__init_cpu_features_constructor(hwcap, arg); | ||
} | ||
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void CONSTRUCTOR_ATTRIBUTE __init_cpu_features(void) { | ||
// CPU features already initialized. | ||
if (__aarch64_cpu_features.features) | ||
return; | ||
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__ifunc_arg_t arg; | ||
arg._size = sizeof(__ifunc_arg_t); | ||
arg._hwcap = getauxval(AT_HWCAP); | ||
arg._hwcap2 = getauxval(AT_HWCAP2); | ||
__init_cpu_features_constructor(hwcap | _IFUNC_ARG_HWCAP, &arg); | ||
} |
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I believe you've misspelled Fuchsia consistently :-)
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🤦♂️ thanks