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Merged
merged 2 commits into from
Feb 7, 2024
Merged

PR for llvm/llvm-project#78621 #80260

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4251261
[ConstraintElim] Add tests for #78621.
fhahn Jan 24, 2024
56c50a4
[ConstraintElim] Make sure min/max intrinsic results are not poison.
fhahn Jan 24, 2024
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7 changes: 6 additions & 1 deletion llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1061,11 +1061,16 @@ void State::addInfoFor(BasicBlock &BB) {
FactOrCheck::getCheck(DT.getNode(&BB), cast<CallInst>(&I)));
break;
// Enqueue the intrinsics to add extra info.
case Intrinsic::abs:
case Intrinsic::umin:
case Intrinsic::umax:
case Intrinsic::smin:
case Intrinsic::smax:
// TODO: Check if it is possible to instead only added the min/max facts
// when simplifying uses of the min/max intrinsics.
if (!isGuaranteedNotToBePoison(&I))
break;
[[fallthrough]];
case Intrinsic::abs:
WorkList.push_back(FactOrCheck::getInstFact(DT.getNode(&BB), &I));
break;
}
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4 changes: 3 additions & 1 deletion llvm/test/Transforms/ConstraintElimination/minmax.ll
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Expand Up @@ -306,7 +306,9 @@ define i1 @smin_branchless(i32 %x, i32 %y) {
; CHECK-SAME: (i32 [[X:%.*]], i32 [[Y:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[X]], i32 [[Y]])
; CHECK-NEXT: [[RET:%.*]] = xor i1 true, false
; CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[MIN]], [[X]]
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[MIN]], [[X]]
; CHECK-NEXT: [[RET:%.*]] = xor i1 [[CMP1]], [[CMP2]]
; CHECK-NEXT: ret i1 [[RET]]
;
entry:
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62 changes: 62 additions & 0 deletions llvm/test/Transforms/ConstraintElimination/umin-result-may-be-poison.ll
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@@ -0,0 +1,62 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
; RUN: opt -p constraint-elimination -S %s | FileCheck %s

; Tests for https://github.com/llvm/llvm-project/issues/78621.

define i1 @umin_not_used(i32 %arg) {
; CHECK-LABEL: define i1 @umin_not_used(
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[ICMP:%.*]] = icmp slt i32 [[ARG]], 0
; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[ARG]], 3
; CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.umin.i32(i32 [[SHL]], i32 80)
; CHECK-NEXT: [[CMP2:%.*]] = shl nuw nsw i32 [[ARG]], 3
; CHECK-NEXT: ret i1 [[ICMP]]
;
%icmp = icmp slt i32 %arg, 0
%shl = shl nuw nsw i32 %arg, 3
call i32 @llvm.umin.i32(i32 %shl, i32 80)
%cmp2 = shl nuw nsw i32 %arg, 3
ret i1 %icmp
}

define i1 @umin_poison_is_UB_via_call(i32 %arg) {
; CHECK-LABEL: define i1 @umin_poison_is_UB_via_call(
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[ARG]], 3
; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SHL]], i32 80)
; CHECK-NEXT: call void @noundef(i32 noundef [[MIN]])
; CHECK-NEXT: [[CMP2:%.*]] = shl nuw nsw i32 [[ARG]], 3
; CHECK-NEXT: ret i1 false
;
%icmp = icmp slt i32 %arg, 0
%shl = shl nuw nsw i32 %arg, 3
%min = call i32 @llvm.umin.i32(i32 %shl, i32 80)
call void @noundef(i32 noundef %min)
%cmp2 = shl nuw nsw i32 %arg, 3
ret i1 %icmp
}

define i1 @umin_poison_call_before_UB(i32 %arg) {
; CHECK-LABEL: define i1 @umin_poison_call_before_UB(
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[ICMP:%.*]] = icmp slt i32 [[ARG]], 0
; CHECK-NEXT: [[SHL:%.*]] = shl nuw nsw i32 [[ARG]], 3
; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.umin.i32(i32 [[SHL]], i32 80)
; CHECK-NEXT: call void @fn()
; CHECK-NEXT: call void @noundef(i32 noundef [[MIN]])
; CHECK-NEXT: [[CMP2:%.*]] = shl nuw nsw i32 [[ARG]], 3
; CHECK-NEXT: ret i1 [[ICMP]]
;
%icmp = icmp slt i32 %arg, 0
%shl = shl nuw nsw i32 %arg, 3
%min = call i32 @llvm.umin.i32(i32 %shl, i32 80)
call void @fn()
call void @noundef(i32 noundef %min)
%cmp2 = shl nuw nsw i32 %arg, 3
ret i1 %icmp
}

declare i32 @llvm.umin.i32(i32, i32) #0

declare void @noundef(i32 noundef)
declare void @fn()