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[AMDGPU] Rewrite getVOPSrc0ForVT with !cond #81956

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Merged
merged 1 commit into from
Feb 16, 2024
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[AMDGPU] Rewrite getVOPSrc0ForVT with !cond #81956

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50 changes: 19 additions & 31 deletions llvm/lib/Target/AMDGPU/SIInstrInfo.td
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Original file line number Diff line number Diff line change
Expand Up @@ -1488,37 +1488,25 @@ class getSDWADstForVT<ValueType VT> {
// instructions for the given VT.
class getVOPSrc0ForVT<ValueType VT, bit IsTrue16, bit IsFake16 = 1> {
RegisterOperand ret =
!if(VT.isFP,
!if(!eq(VT.Size, 64),
VSrc_f64,
!if(!or(!eq(VT.Value, f16.Value), !eq(VT.Value, bf16.Value)),
!if(IsTrue16,
!if(IsFake16, VSrcFake16_f16_Lo128, VSrcT_f16_Lo128),
VSrc_f16
),
!if(!or(!eq(VT.Value, v2f16.Value), !eq(VT.Value, v2bf16.Value)),
VSrc_v2f16,
!if(!or(!eq(VT.Value, v4f16.Value), !eq(VT.Value, v4bf16.Value)),
AVSrc_64,
VSrc_f32
)
)
)
),
!if(!eq(VT.Size, 64),
VSrc_b64,
!if(!eq(VT.Value, i16.Value),
!if(IsTrue16,
!if(IsFake16, VSrcFake16_b16_Lo128, VSrcT_b16_Lo128),
VSrc_b16
),
!if(!eq(VT.Value, v2i16.Value),
VSrc_v2b16,
VSrc_b32
)
)
)
);
!cond(!eq(VT, i64) : VSrc_b64,
!eq(VT, f64) : VSrc_f64,
!eq(VT, i32) : VSrc_b32,
!eq(VT, f32) : VSrc_f32,
!eq(VT, i16) : !if(IsTrue16,
!if(IsFake16, VSrcFake16_b16_Lo128, VSrcT_b16_Lo128),
VSrc_b16),
!eq(VT, f16) : !if(IsTrue16,
!if(IsFake16, VSrcFake16_f16_Lo128, VSrcT_f16_Lo128),
VSrc_f16),
!eq(VT, bf16) : !if(IsTrue16,
!if(IsFake16, VSrcFake16_f16_Lo128, VSrcT_f16_Lo128),
VSrc_f16),
!eq(VT, v2i16) : VSrc_v2b16,
!eq(VT, v2f16) : VSrc_v2f16,
!eq(VT, v2bf16) : VSrc_v2f16,
!eq(VT, v4f16) : AVSrc_64,
!eq(VT, v4bf16) : AVSrc_64,
Comment on lines +1507 to +1508
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I'd prefer to common up all the pairs of cases that have the same result e.g.:

Suggested change
!eq(VT, v4f16) : AVSrc_64,
!eq(VT, v4bf16) : AVSrc_64,
!or(!eq(VT, v4f16), !eq(VT, v4bf16)) : AVSrc_64,

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@shiltian shiltian Feb 16, 2024 •
edited
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Yeah, but the alignment will be off in that way. Also, after #80056 is landed, the f16 and bf16 variants will not use same value.

Update: After #80908 is landed. Not #80056.

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Also, after #80056 is landed, the f16 and bf16 variants will not use same value.

OK.

1 : VSrc_b32);
}

class getSOPSrcForVT<ValueType VT> {
Expand Down