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[Feature Request] Make hlsl::IntrinsicOp enum values stable #7230
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tex3d
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Mar 20, 2025
This change makes hlsl::IntrinsicOp enum values stable by: - adding hlsl_intrinsic_opcodes.json to capture assigned indices - adds this to the files generated by hctgen - generation assigns new indices after the last index - hlsl::IntrinsicOp enum values have explicit assignments Fixes microsoft#7230
tex3d
added a commit
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Mar 20, 2025
This change makes hlsl::IntrinsicOp enum values stable by: - adding hlsl_intrinsic_opcodes.json to capture assigned indices - adds this to the files generated by hctgen - generation assigns new indices after the last index - hlsl::IntrinsicOp enum values have explicit assignments Fixes microsoft#7230
tex3d
added a commit
that referenced
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Mar 20, 2025
This change makes hlsl::IntrinsicOp enum values stable by: - adding hlsl_intrinsic_opcodes.json to capture assigned indices - adds this to the files generated by hctgen - generation assigns new indices after the last index - hlsl::IntrinsicOp enum values have explicit assignments - removes ENABLE_SPIRV_CODEGEN ifdefs around opcode definitions and lowering table entries to keep these stable whether or not the spirv build setting is enabled. Fixes #7230
pow2clk
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Mar 26, 2025
This change makes hlsl::IntrinsicOp enum values stable by: - adding hlsl_intrinsic_opcodes.json to capture assigned indices - adds this to the files generated by hctgen - generation assigns new indices after the last index - hlsl::IntrinsicOp enum values have explicit assignments - removes ENABLE_SPIRV_CODEGEN ifdefs around opcode definitions and lowering table entries to keep these stable whether or not the spirv build setting is enabled. Fixes microsoft#7230
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Is your feature request related to a problem? Please describe.
The
hlsl::IntrinsicOp
enum values identify the operation in a high-level intrinsic call in the intermediate IR before lowering to DXIL. Currently, when any operations change in this list, it can impact the value for all operations after the changes in sorted order. Also, the ENABLE_SPIRV_CODEGEN definition addsVk
operations into the middle of the enum definition, which makes the following values depend on this setting.In the original design, these operations were not intended to be stable between different compiler builds. However, this makes it impossible to write a stable pass test for any pass that starts before
dxilgen
is complete. We should be testing thedxilgen
pass with a pass test, rather than only using end-to-end HLSL to DXIL tests as we have in the past, as well as any other changes we make in passes run beforedxilgen
.Describe the solution you'd like
I'd like to add to the files generated at build time (
-update-generated-files
), a.json
file that keeps an assigned value for each HLSL intrinsic operation by name. The automatic parsing and generating of intrinsics fromgen_intrin_main.txt
would preserve any already-assigned opcodes from the.json
, and assign new ones starting just after the highest opcode value currently assigned. When using the option-update-generated-files
, the committed.json
file would be updated with any new opcodes assigned during this process. Without this option, if the opcodes assignments need to be extended, a build error will be produced, just as it is for other generated files that are part of the project source code. When committing changes that include new opcodes, the.json
file changes would be part of that commit, fixing those opcodes to specific values in all future versions.For the
hlsl::IntrinsicOp
enum, explicit value assignments will be added so that the existing sorting behavior can be left unchanged. Enum values for theVk
opcodes will be unconditionally defined, even though they may not be used when ENABLE_SPIRV_CODEGEN is undefined. New enum values will continue to appear in sorted order inside the enum definition, but with explicit assignments to new higher opcode values, and the explicit assignments of all existing opcodes would remain unchanged.This approach preserves the current ordering of opcodes to prevent large changes to the lowering table defined in
HLOperationLower.cpp
. In the future, all new opcodes would appear at the end of this table. One additional change for the table is thatVk
opcodes need to always have table entries, even when ENABLE_SPIRV_CODEGEN is disabled. The entries may have a special lowering function entry that just causes a diagnostic failure from the pass, since HLOperationLower should never encounter aVk
opcode in practice. In addition, this table has always had the requirement that the index of the entry in the table match thehlsl::IntrinsicOp
value for that entry, but this has never been enforced explicitly. Additional static (compile-time) checking will be added to guarantee that this requirement is met.Moving
Vk
opcodes into a separate groupOne thing that could help is to move the
Vk
opcodes into a separate intrinsic grouping (HLOpcodeGroup
). This would prevent these operations from being interspersed with normal HLSL intrinsic operations that must be handled in HLOperationLower, for instance. This has been a kind of backburner desire for quite some time.An argument could be made that if we do this for
Vk
intrinsics, we should do the same for upcomingDx
intrinsics (which are intended to be limited to DXIL), but that would introduce yet anotherHLOpcodeGroup
, and require another lowering table. This might be ok, but it's looking like a generalized pattern for defining multiple intrinsic tables driven fromgen_intrin_main.txt
might need to be designed.The main downside is the additional infrastructure work to support multiple intrinsic tables generated from
gen_intrin_main.txt
.New groups would also require a new generated intrinsic enum for each new group of generated intrinsic operations. New tables defining each grouping of intrinsics would need to be defined and generated. SemaHLSL is already designed to handle multiple tables to a large extent, specifically to support the extension mechanism. For lowering, additional lowering tables could be added relatively easily. However, some code handling intrinsics would need to be extended to check for these new tables. There would need to be multiple lowering tables in
HLOperationLower.cpp
, to account for the newDx
intrinsics that still need to be lowered there. In SemaHLSL, there is an expectation that there is only one built-in table (see:IsBuiltinTable
,HasUnsignedIntrinsicOpcode
) in various places. These would need to be revised.This change is not strictly necessary for the main purpose of this issue: to make HLSL intrinsic opcodes stable. However, doing this work after fixing the HLSL intrinsic opcodes would complicate things, requiring the leaving of gaps and special entries across various tables to accommodate the removed and now reserved opcodes in the main intrinsic enum and tables. Ideally, we either decide we will never make this change, or we make this change before fixing the opcode values according to this issue.
Describe alternatives you've considered
gen_intrin_main.txt
. This has some drawbacks:IOP_
opcode, and a method of the same name will share the sameMOP_
opcode. Keeping opcodes stable would require adding new instances of existing namespaces to the end of the file to contain new methods, and new intrinsics at the end of the file, instead of grouping them logically alongside other methods or functions, as is currently done.hctdb.py
code may need to be updated to handle duplicate namespace definitions properly in parsing.HLOperationLower.cpp
. This would be a very large and difficult change to reliably make and review.gen_intrin_main.txt
. This has drawbacks:Additional context
Recent additions of
dxilgen
lowering tests for some SM 6.9 work in progress already created problems depending onENABLE_SPIRV_CODEGEN
, or when adding anotherhlsl::IntrinsicOp
for another part of the work. A temporary mitigation was committed to always build withENABLE_SPIRV_CODEGEN
defined, but that doesn't solve the underlying issue, particularly when new intrinsics will be soon added, requiring manual changes to any existing IR tests for each addition.Since many more intrinsics and IR tests will be added for SM 6.9 work, this issue needs to be solved as soon as possible to prevent the painful, blocking problems that will inevitably arise otherwise.
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