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New optional feature: PLIC external interrupt handling with virq #49

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7c510f6
Create optional external interupt handler
steewbsd Nov 30, 2022
f333eb2
Format code with rustfmt
steewbsd Dec 1, 2022
c17e6d6
Create all handlers and simplify interrupt matching
steewbsd Dec 1, 2022
a514a13
Comment the linker script and include other .x
steewbsd Dec 2, 2022
8a7d043
* interrupts.x: Add handlers for each interrupt source
steewbsd Dec 2, 2022
0bd4329
Add feature for exthandler and linker flag
steewbsd Dec 7, 2022
70b7419
Cargo fmt
steewbsd Dec 7, 2022
8f92326
Remove unused import
steewbsd Dec 7, 2022
1469aca
Leverage the virq feature script to hifive1
steewbsd Dec 12, 2022
33da6ac
Bump version
steewbsd Dec 12, 2022
f62acf3
test (rebase later)
steewbsd Dec 12, 2022
8d17950
Test without build.rs
steewbsd Dec 12, 2022
f933d08
Revert to build.rs
steewbsd Dec 12, 2022
c9e70f5
Fix wrong comment type in .x
steewbsd Dec 12, 2022
3cadd18
code format and add a comment on .x
steewbsd Dec 14, 2022
ce823f9
Bump riscv version
steewbsd Feb 17, 2023
612c737
Change travis CI for virq
steewbsd Feb 17, 2023
eaee9eb
Naming
romancardenas Feb 18, 2023
38bb15a
Documentation fix
romancardenas Feb 18, 2023
921e4ca
(clippy) changing Into to From
romancardenas Feb 18, 2023
e8a83f3
non-breaking clippy changes
romancardenas Feb 18, 2023
9905b00
(Clippy) rename capitalized acronyms
romancardenas Feb 19, 2023
8a8dbad
(clippy) fix safety doc stuff
romancardenas Feb 19, 2023
13a3827
Changing core module for consistency
romancardenas Feb 19, 2023
14ee9a8
Added changes to changelog
romancardenas Feb 19, 2023
25d1f3c
Minor changes
romancardenas Feb 19, 2023
8f168fc
linker file name is now microcontroller-specific
romancardenas Feb 19, 2023
f97307f
changelog modified
romancardenas Feb 19, 2023
2d6b17c
Merge branch 'master' into master
romancardenas Feb 19, 2023
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6 changes: 5 additions & 1 deletion .github/workflows/ci.yaml
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,8 @@ jobs:
run: |
cargo check --target riscv32imac-unknown-none-elf
cargo check --target riscv32imac-unknown-none-elf --features g002
cargo check --target riscv32imac-unknown-none-elf --features virq
cargo check --target riscv32imac-unknown-none-elf --features g002,virq

# On macOS and Windows, we at least make sure that the crate builds and links.
build-other:
Expand All @@ -52,4 +54,6 @@ jobs:
- name: Build crate for host OS
run: |
cargo build
cargo build --features g002
cargo build --features g002
cargo build --features virq
cargo build --features g002,virq
10 changes: 10 additions & 0 deletions .vscode/settings.json
Original file line number Diff line number Diff line change
@@ -0,0 +1,10 @@
{
"[rust]": {
"editor.defaultFormatter": "rust-lang.rust-analyzer",
"editor.formatOnSave": true
},
"rust-analyzer.cargo.features": [
"g002",
"virq",
]
}
2 changes: 2 additions & 0 deletions CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
- Added Pulse Width Modulation interface implementing `embedded_hal::Pwm`
- Update `e310x` dependency to version 0.10
- Update `riscv` dependency to version 0.8
- Added `interrupt` module for vectored interrupt handlers. The feature `virq` activates this module.
- Adapted to Clippy directives

## [v0.9.4] - 2022-07-10

Expand Down
5 changes: 3 additions & 2 deletions Cargo.toml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[package]
name = "e310x-hal"
version = "0.9.3"
version = "0.10.0"
authors = ["David Craven <[email protected]>"]
repository = "https://github.com/riscv-rust/e310x-hal"
categories = ["embedded", "hardware-support", "no-std"]
Expand All @@ -18,6 +18,7 @@ e310x = { version = "0.10.0", features = ["rt"] }

[features]
g002 = ["e310x/g002"]
virq = []

[package.metadata.docs.rs]
features = ["g002"]
features = ["g002", "virq"]
10 changes: 10 additions & 0 deletions build.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,10 @@
use std::path::PathBuf;
use std::{env, fs};

fn main() {
// Put the linker script somewhere the linker can find it
let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap());
println!("cargo:rustc-link-search={}", out_dir.display());
fs::copy("fe310x-interrupt.x", out_dir.join("fe310x-interrupt.x")).unwrap();
println!("cargo:rerun-if-changed=fe310x-interrupt.x");
}
59 changes: 59 additions & 0 deletions fe310x-interrupt.x
Original file line number Diff line number Diff line change
@@ -0,0 +1,59 @@
/* This file should be included by hifive1 if virq feature is enabled */

/* Weak symbol for other machine external interrupts handler */
PROVIDE(OtherMachineExternal = DefaultMachineExternal);

/* Weak symbols for each external interrupt handler */
PROVIDE(WATCHDOG = OtherMachineExternal);
PROVIDE(RTC = OtherMachineExternal);
PROVIDE(UART0 = OtherMachineExternal);
PROVIDE(UART1 = OtherMachineExternal);
PROVIDE(QSPI0 = OtherMachineExternal);
PROVIDE(QSPI1 = OtherMachineExternal);
PROVIDE(QSPI2 = OtherMachineExternal);
PROVIDE(GPIO0 = OtherMachineExternal);
PROVIDE(GPIO1 = OtherMachineExternal);
PROVIDE(GPIO2 = OtherMachineExternal);
PROVIDE(GPIO3 = OtherMachineExternal);
PROVIDE(GPIO4 = OtherMachineExternal);
PROVIDE(GPIO5 = OtherMachineExternal);
PROVIDE(GPIO6 = OtherMachineExternal);
PROVIDE(GPIO7 = OtherMachineExternal);
PROVIDE(GPIO8 = OtherMachineExternal);
PROVIDE(GPIO9 = OtherMachineExternal);
PROVIDE(GPIO10 = OtherMachineExternal);
PROVIDE(GPIO11 = OtherMachineExternal);
PROVIDE(GPIO12 = OtherMachineExternal);
PROVIDE(GPIO13 = OtherMachineExternal);
PROVIDE(GPIO14 = OtherMachineExternal);
PROVIDE(GPIO15 = OtherMachineExternal);
PROVIDE(GPIO16 = OtherMachineExternal);
PROVIDE(GPIO17 = OtherMachineExternal);
PROVIDE(GPIO18 = OtherMachineExternal);
PROVIDE(GPIO19 = OtherMachineExternal);
PROVIDE(GPIO20 = OtherMachineExternal);
PROVIDE(GPIO21 = OtherMachineExternal);
PROVIDE(GPIO22 = OtherMachineExternal);
PROVIDE(GPIO23 = OtherMachineExternal);
PROVIDE(GPIO24 = OtherMachineExternal);
PROVIDE(GPIO25 = OtherMachineExternal);
PROVIDE(GPIO26 = OtherMachineExternal);
PROVIDE(GPIO27 = OtherMachineExternal);
PROVIDE(GPIO28 = OtherMachineExternal);
PROVIDE(GPIO29 = OtherMachineExternal);
PROVIDE(GPIO30 = OtherMachineExternal);
PROVIDE(GPIO31 = OtherMachineExternal);
PROVIDE(PWM0CMP0 = OtherMachineExternal);
PROVIDE(PWM0CMP1 = OtherMachineExternal);
PROVIDE(PWM0CMP2 = OtherMachineExternal);
PROVIDE(PWM0CMP3 = OtherMachineExternal);
PROVIDE(PWM1CMP0 = OtherMachineExternal);
PROVIDE(PWM1CMP1 = OtherMachineExternal);
PROVIDE(PWM1CMP2 = OtherMachineExternal);
PROVIDE(PWM1CMP3 = OtherMachineExternal);
PROVIDE(PWM2CMP0 = OtherMachineExternal);
PROVIDE(PWM2CMP1 = OtherMachineExternal);
PROVIDE(PWM2CMP2 = OtherMachineExternal);
PROVIDE(PWM2CMP3 = OtherMachineExternal);
/* Weak symbol for I2C0 (g002 only) */
PROVIDE(I2C0 = OtherMachineExternal);
16 changes: 8 additions & 8 deletions src/clock.rs
Original file line number Diff line number Diff line change
Expand Up @@ -175,10 +175,10 @@ impl CoreClk {
/// The resulting frequency may differ by 0-2% from the requested
fn configure_pll(&self, pllref_freq: Hertz, divout_freq: Hertz) -> Hertz {
let pllref_freq = pllref_freq.0;
assert!(PLLREF_MIN <= pllref_freq && pllref_freq <= PLLREF_MAX);
assert!((PLLREF_MIN..=PLLREF_MAX).contains(&pllref_freq));

let divout_freq = divout_freq.0;
assert!(DIVOUT_MIN <= divout_freq && divout_freq <= DIVOUT_MAX);
assert!((DIVOUT_MIN..=DIVOUT_MAX).contains(&divout_freq));

// Calculate PLL Output Divider settings
let divider_div;
Expand All @@ -205,7 +205,7 @@ impl CoreClk {
2 * (divider_div + 1)
};
let pllout_freq = divout_freq * d;
assert!(PLLOUT_MIN <= pllout_freq && pllout_freq <= PLLOUT_MAX);
assert!((PLLOUT_MIN..=PLLOUT_MAX).contains(&pllout_freq));

// Calculate PLL R ratio
let r = match pllref_freq {
Expand All @@ -218,7 +218,7 @@ impl CoreClk {

// Calculate refr frequency
let refr_freq = pllref_freq / r;
assert!(REFR_MIN <= refr_freq && refr_freq <= REFR_MAX);
assert!((REFR_MIN..=REFR_MAX).contains(&refr_freq));

// Calculate PLL Q ratio
let q = match pllout_freq {
Expand All @@ -230,7 +230,7 @@ impl CoreClk {

// Calculate the desired vco frequency
let target_vco_freq = pllout_freq * q;
assert!(VCO_MIN <= target_vco_freq && target_vco_freq <= VCO_MAX);
assert!((VCO_MIN..=VCO_MAX).contains(&target_vco_freq));

// Calculate PLL F ratio
let f = target_vco_freq / refr_freq;
Expand All @@ -249,15 +249,15 @@ impl CoreClk {
} else {
(f_lo, vco_lo)
};
assert!(VCO_MIN <= vco_freq && vco_freq <= VCO_MAX);
assert!((VCO_MIN..=VCO_MAX).contains(&vco_freq));

// Calculate actual pllout frequency
let pllout_freq = vco_freq / q;
assert!(PLLOUT_MIN <= pllout_freq && pllout_freq <= PLLOUT_MAX);
assert!((PLLOUT_MIN..=PLLOUT_MAX).contains(&pllout_freq));

// Calculate actual divout frequency
let divout_freq = pllout_freq / d;
assert!(DIVOUT_MIN <= divout_freq && divout_freq <= DIVOUT_MAX);
assert!((DIVOUT_MIN..=DIVOUT_MAX).contains(&divout_freq));

// Calculate bit-values
let r: u8 = (r - 1) as u8;
Expand Down
3 changes: 2 additions & 1 deletion src/core/mod.rs → src/core.rs
Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,8 @@ impl CorePeripherals {
}
}

/// Steal the peripherals
/// Steal the peripherals.
#[allow(clippy::missing_safety_doc)]
pub unsafe fn steal() -> Self {
let p = e310x::Peripherals::steal();
Self::new(p.CLINT, p.PLIC)
Expand Down
6 changes: 3 additions & 3 deletions src/core/plic.rs
Original file line number Diff line number Diff line change
Expand Up @@ -43,11 +43,11 @@ impl Priority {
}
}

impl Into<u32> for Priority {
impl From<Priority> for u32 {
/// Returns the numeric priority for writing to a
/// interrupt priority or the plic threshold register.
fn into(self) -> u32 {
match self {
fn from(val: Priority) -> Self {
match val {
Priority::P0 => 0,
Priority::P1 => 1,
Priority::P2 => 2,
Expand Down
6 changes: 6 additions & 0 deletions src/delay.rs
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,12 @@ impl Delay {
}
}

impl Default for Delay {
fn default() -> Self {
Self::new()
}
}

impl DelayUs<u32> for Delay {
fn delay_us(&mut self, us: u32) {
let ticks = (us as u64) * TICKS_PER_SECOND / 1_000_000;
Expand Down
1 change: 1 addition & 0 deletions src/device.rs
Original file line number Diff line number Diff line change
Expand Up @@ -173,6 +173,7 @@ impl DeviceResources {
}

/// Unchecked version of `DeviceResources::take`
#[allow(clippy::missing_safety_doc)]
pub unsafe fn steal() -> Self {
e310x::Peripherals::steal().into()
}
Expand Down
4 changes: 3 additions & 1 deletion src/i2c.rs
Original file line number Diff line number Diff line change
Expand Up @@ -19,8 +19,10 @@ use e310x::{i2c0, I2C0};
use embedded_hal::blocking::i2c::{Read, Write, WriteRead};

/// SDA pin - DO NOT IMPLEMENT THIS TRAIT
#[allow(clippy::missing_safety_doc)]
pub unsafe trait SdaPin<I2C> {}
/// SCL pin - DO NOT IMPLEMENT THIS TRAIT
#[allow(clippy::missing_safety_doc)]
pub unsafe trait SclPin<I2C> {}

unsafe impl<T> SdaPin<I2C0> for gpio0::Pin12<IOF0<T>> {}
Expand Down Expand Up @@ -121,7 +123,7 @@ impl<I2C: Deref<Target = i2c0::RegisterBlock>, PINS> I2c<I2C, PINS> {
}

fn read_sr(&self) -> i2c0::sr::R {
unsafe { mem::transmute(self.i2c.sr().read()) }
self.i2c.sr().read()
}

fn write_byte(&self, byte: u8) {
Expand Down
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