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Target: Add mips mti baremetal support #135074
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36 changes: 36 additions & 0 deletions
36
compiler/rustc_target/src/spec/targets/mips_mti_none_elf.rs
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use crate::abi::Endian; | ||
use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; | ||
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pub(crate) fn target() -> Target { | ||
Target { | ||
data_layout: "E-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), | ||
llvm_target: "mips".into(), | ||
metadata: crate::spec::TargetMetadata { | ||
description: Some("MIPS32r2 BE Baremetal Softfloat".into()), | ||
tier: Some(3), | ||
host_tools: Some(false), | ||
std: None, // ? | ||
}, | ||
pointer_width: 32, | ||
arch: "mips".into(), | ||
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options: TargetOptions { | ||
vendor: "mti".into(), | ||
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), | ||
linker: Some("rust-lld".into()), | ||
endian: Endian::Big, | ||
cpu: "mips32r2".into(), | ||
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max_atomic_width: Some(32), | ||
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features: "+mips32r2,+soft-float,+noabicalls".into(), | ||
executables: true, | ||
panic_strategy: PanicStrategy::Abort, | ||
relocation_model: RelocModel::Static, | ||
emit_debug_gdb_scripts: false, | ||
eh_frame_header: false, | ||
singlethread: true, | ||
..Default::default() | ||
}, | ||
} | ||
} |
36 changes: 36 additions & 0 deletions
36
compiler/rustc_target/src/spec/targets/mipsel_mti_none_elf.rs
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Original file line number | Diff line number | Diff line change |
---|---|---|
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use crate::abi::Endian; | ||
use crate::spec::{Cc, LinkerFlavor, Lld, PanicStrategy, RelocModel, Target, TargetOptions}; | ||
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pub(crate) fn target() -> Target { | ||
Target { | ||
data_layout: "e-m:m-p:32:32-i8:8:32-i16:16:32-i64:64-n32-S64".into(), | ||
llvm_target: "mipsel".into(), | ||
metadata: crate::spec::TargetMetadata { | ||
description: Some("MIPS32r2 LE Baremetal Softfloat".into()), | ||
tier: Some(3), | ||
host_tools: Some(false), | ||
std: None, // ? | ||
}, | ||
pointer_width: 32, | ||
arch: "mips".into(), | ||
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options: TargetOptions { | ||
vendor: "mti".into(), | ||
linker_flavor: LinkerFlavor::Gnu(Cc::No, Lld::Yes), | ||
linker: Some("rust-lld".into()), | ||
endian: Endian::Little, | ||
cpu: "mips32r2".into(), | ||
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max_atomic_width: Some(32), | ||
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features: "+mips32r2,+soft-float,+noabicalls".into(), | ||
executables: true, | ||
panic_strategy: PanicStrategy::Abort, | ||
relocation_model: RelocModel::Static, | ||
emit_debug_gdb_scripts: false, | ||
eh_frame_header: false, | ||
singlethread: true, | ||
..Default::default() | ||
}, | ||
} | ||
} |
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# `mips*-mti-none-elf` | ||
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**Tier: 3** | ||
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MIPS32r2 baremetal softfloat, Big Endian or Little Enedian. | ||
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- mips-mti-none-elf | ||
- mipsel-mti-none-elf | ||
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## Target maintainers | ||
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- YunQiang Su, `[email protected]`, https://github.com/wzssyqa | ||
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## Background | ||
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These 2 targets, aka mips-mti-none-elf and mipsel-mti-none-elf, are for | ||
baremetal development of MIPS32r2. The lld is used instead of Gnu-ld. | ||
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## Requirements | ||
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The target only supports cross compilation and no host tools. The target | ||
supports `alloc` with a default allocator while only support `no-std` development. | ||
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The vendor name `mti` follows the naming of gcc to indicate MIPS32r2. | ||
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## Cross-compilation toolchains and C code | ||
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Compatible C code can be built for this target on any compiler that has a MIPS32r2 | ||
target. On clang and ld.lld linker, it can be generated using the | ||
`-march=mips`/`-march=mipsel`, `-mabi=32` with llvm features flag | ||
`features=+mips32r2,+soft-float,+noabicalls`. |
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